Challenge the assumptions on FPGAs

Before I joined Xilinx in 2004, I ascribed to the widely held opinion that FPGAs were "great for prototyping, but too expensive and power-hungry for volume DSP system deployment." In my mind, FPGAs lacked the cost- and power-efficiencies needed to satisfy the respective budgets within which today's DSP system architects must confine their designs. However, it didn't take long for my "DSP worldview" to be dramatically and irreversibly changed.

Today's high-performance, DSP-optimized FPGAs are already playing a key role in the world within which the DSP design community finds itself—a world of rapidly evolving and converging standards, critically short market windows, economically and technologically constrained design efforts, and incredibly large rewards for a winning design.

FPGAs have become popular for DSP largely because they offer a combination of performance and flexibility. (See Figure 1.) Consider high-growth markets like the communications, multimedia, and defense industries—all of which depend heavily on high-performance DSP technologies. These markets are in a constant state of flux, with constantly changing standards, market demands, customer requirements, and competitive landscapes. To keep pace in these markets, companies need powerful, flexible processors—making FPGAs a great fit.

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Figure 1. The DSP technology landscape. Excerpted from "FPGAs for DSP, Second Edition" © 2007 Berkeley Design Technology, Inc. See www.BDTI.com for more information.

In a recent report titled "DSP Strategies" from DSP market research firm Forward Concepts, Will Strauss forecasted that the reconfigurable DSP segment (which is 99 percent FPGAs) would outgrow any other segment in the overall DSP market over the next five years. Strauss also indicated that FPGAs are often used as a "heavy lifting" computational vehicle to augment the capabilities of traditional DSP chips. In other words, FPGAs are not replacing DSPs per se. Instead, the growing capabilities of FPGAs are creating new markets for DSP technology.

Taking DSP Performance to the Limit
Among the more significant dynamics driving the need for FPGAs in DSP applications is the slowing growth of traditional processor performance. Although Moore's Law continues to allow processors to be produced in ever-smaller process geometries, it is becoming more and more difficult to extract performance increases in DSPs and GPPs simply by scaling process geometry.

Conversely, algorithmic complexity has been growing at an accelerated rate, due in large part to the demand for communications systems that push the upper limits of data transmission efficiency as defined by Shannon's Law (see Figure 2). Advanced techniques such as Turbo coding and MIMO systems come much closer to reaching the theoretical Shannon limit, but at a cost of high computational complexity.

This leaves an ever-widening gap between algorithmic performance requirements and processor performance. As a result, designers must consider extending their design repertoire beyond fixed architecture processors (such as DSPs) to include the FPGA.

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Figure 2. FPGAs fill the performance gap created by the growth in algorithmic complexity and the inefficiency of fixed-architecture processors