Achieving Yield in the Nanometer Age

Integrated circuit design has followed a similar path. Early on, design rules were absolute and finite. The path to yield was fairly simple " comply with all the design rules, and yield would follow. Designers didn't need to worry too much about what happened in the fab after tape-out.

In the nanometer era, the game has changed. Yield success is much harder to achieve, because of the increased number and complexity of variables affecting manufacturability. The definition of yield itself has changed, now incorporating measures of variable power management, multi-modal performance and circuit integrity. The designer's strategy must shift from simple design rule compliance to the definition and design of the optimal layout for the highest yield.

The most obvious factor is the exponential explosion of feature count and design rules resulting from finer feature size and increasing interconnects (Figure 1). There are more DRC rules, and they are much more complex and often interdependent. Feature-based (systematic) defects are overtaking particle-based (random) defects as a cause of yield loss.

1. Comparison of the changes in feature and wavelength size since 1980.

On the manufacturing side, there are production issues that can't even be predicted or avoided by the use of any rules, due to process and materials variation. Manufacturing variability now has a much larger percentage effect on critical dimensions, speed and power.

All of these factors have contributed to three salient failure mechanisms:

• Greater sensitivity to smaller defects
• Unruliness of process variation
• Parametric drift

To win the game, we need to change the way the game is played. Sign-off still needs to include the fundamental, rule-based physical verification, as well as parasitic extraction, but we also need to begin incorporating automated technologies that improve yield not only by correcting errors at the manufacturing stage, but also by enhancing the design itself.

So, what variations can we introduce to our yield game that can help us win?

Critical feature analysis (sometimes called recommended rules analysis) extends the nature of DRC rules from a pure Pass/No Pass test to include graded assessments of "hotspots" in a physical design that have an historically higher failure rate or are likely to have higher sensitivity to variations across the manufacturing process window. Designers can use CFA to determine the location of these hotspots and prioritize design adjustments by order of the most significant yield improvement opportunities.

Critical area modeling assesses the impact of random defects based on the design size and suggests design adjustments to minimize the percentage of these errors that reduce yield. This capability is particularly important as design size decreases, since no one has yet figured out how to make a speck of dust smaller!

Lithography variation analysis comes into play as design size drops below 90nm. Even if you've complied fully with every design rule. certain layout topologies will fail, due to lithographic process variation and equipment drift. We can surmount this obstacle by defining those factors and incorporating them into our design. Of course, this requires the designers to communicate with the foundries and plants to define these variations and minimize their impact through design.

Manufacturing-aware silicon modeling composes electrical circuit models that more accurately describe the as-built chip, enabling more accurate prediction of the performance of a device as implemented in silicon. Effective modeling at the nanometer level must include robust device extraction (including advanced device parameters such as engineered strain and n-well proximity) to measure and apredict (not assume) distortions that may be induced by the manufacturing process. This allows designers to shift from simply measuring as-drawn devices and interconnects to accounting for the likely effects on as-built parameters and interconnects.

But all of those things are just capabilities. How do we physically play the game? There are many games played with physical items " cards, dice, scorecards " that have been redeveloped in electronic form, enabling people located continents apart to play the same game together, adding new variations and levels of complexity, and enhancing the user experience through graphics, animation, etc.

To succeed in the yield game, we need new ways to incorporate yield functionalities into our automated design tools(Figure 2). We need ways to visualize and prioritize the data produced by these new capabilities. This type of analysis demands automated processing, due to the enormous amount of data produced and the extensive computation required to analyze and prioritize the results. Without a practical and easy way to incorporate these functionalities into the design process, the designer is no better off than before.

2. Automated functionalities help designers by processing immense amounts of data and producing results that can be prioritized and analyzed for yield improvement.

We'll certainly need new tools and/or enhancement of existing tools, changes that are already making their way into the industry. But we need something else that can't be invented or coded or packaged " increased cooperation and information exchange between designers and foundries. Without upstream and downstream information flows, there is no path to success, no matter how hard we play the game.

What does all this mean for us? Designers and manufacturers are two sides of the same team, sharing a common goal " yield. To win out, they need to align their strategies, their skills and their knowledge, and work together to overcome the challenges. That's the way the game is played in the nanometer era.

About the Author:
Anthony Nicoli is the Director of Marketing for the Calibre Physical Verification, Extraction and Design for Manufacturing solutions. He received a B.S. and M.S. in Electrical Engineering from the Massachusetts Institute of Technology, and an MBA from Northeastern University.