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Dr DSP

3/12/2011 12:46 AM EST

This is a great approach that allows low cost microcontrollers to control larger ...

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Fragmented frame buffer graphics ease cluster display requirements

Jim Bridgwater, Freescale Semiconductor

3/9/2011 8:33 PM EST

The instrument cluster is one of the places in a car where the technology changes become most obvious: Graphical representations of all relevant parameters displace mechanical pointer instruments; dashboards become context-sensitive, and interactive. The article provides ways to keep RAM requirements at bay.

Automotive instrument clusters used to be simple, no-nonsense affairs. One or two large gauges for speed and engine revolutions, some smaller gauges for fuel level and water temperature plus a few LEDs were enough (plus a large relay to make that tick-tick noise when you turned the indicator on).

Nowadays designing an instrument cluster is a whole different ballgame. Modern cars have so many different safety systems, driving aids and informational systems that providing a status display to the driver in a clear, unambiguous and attractive way is a real challenge – there is simply not enough space to do this with warning LEDs, even if it were possible. The only solution is to use a configurable LCD to display different information depending on the situation.

Usually a mix of traditional gauges and a reconfigurable LCD panel is employed, because gauges are less expensive and well understood by drivers. The possibility of animated color graphics provides a new way of making an emotional connection to the driver while at the same time introducing new challenges to meet safety standards for display of critical information.

For mainstream high-volume cars all this must also be done within strict cost constraints. The result is that the instrument cluster design engineer is being pulled in two different directions – the first is toward more powerful graphics processors and bigger graphics RAM to control more complex displays; and the second is toward low BOM cost, single-chip solutions to reduce cost. One way to resolve this paradox is to make better use of on-chip graphics RAM, because SRAM is the most expensive user of silicon area in modern deep submicron semiconductor devices.

The Fragmented Frame Buffer method removes the need to store complete frame buffers in RAM, thereby reducing RAM size needed to support large displays. This method also allows images to be stored at an optimum resolution, thus reducing the non-volatile memory requirement as well.

This approach to graphics is pioneered by the Freescale MPC5606S graphics microcontroller. The MPC5606S contains a special display control unit (DCU) which can build up an image from its many elements, blending them together on the fly and sending the result directly to the display without the need for buffering. The blending is done in hardware and synchronized to the display refresh rate so that only fully complete, blended images are shown on the screen.

With this Fragmented Frame Buffer method, there is actually no full frame buffer stored in memory at all. There is only one time that all the elements of a frame come together and that is during the on-the-fly blending process inside the DCU, just before the image is sent to the display. As a result of this unique architecture, the MPC5606S can easily drive a 400 x 240 pixel display with only 160KB of on-chip SRAM – no other graphics RAM is needed.

Read the complete article here, courtesy of Automotive Designline Europe.

View a demonstration of graphic animation capabilities here.

Jim Bridgwater (correct spelling) is global segment marketing manager, Driver Information Systems for Freescale Semiconductor. He can be reached at Jim.Bridgwater@freescale.com.




Dr DSP

3/12/2011 12:46 AM EST

This is a great approach that allows low cost microcontrollers to control larger displays. I would guess even a low cost FPGA could use this same approach

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