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JDT
After reading this article and then following the link to read the complete ...
Aurix architecture enhances power train and safety applications
Heiko Riessland, PLS
5/31/2012 3:10 AM EDT
Infineon recently introduced its 32-bit multicore architecture Aurix (AUtomotive Realtime Integrated neXt generation architecture). This new, extremely high-performance microcontroller (MCU) platform meets the requirements for power train and safety applications of the automotive industry. The first devices based on three TriCore cores not only excel with outstanding performance data but also with sophisticated test and debug tools.
TriCore?
Some of you are now thinking: Wait a minute, I know TriCore. This is not surprising. After all, TriCore was introduced for the first time more than ten years ago. Since then, the TriCore microcontroller architecture has been constantly developed further and has already been used in millions of electronic control units (ECUs) for a wide range of automobile applications such as the control of combustion engines, transmission control units, driver assistance systems, braking systems, airbags and chassis electronics. Furthermore, TriCore devices are used for the control of electric motors, inverters, and for battery management in electrical vehicles.
What is so revolutionary about the new TriCore-based 32-bit multicore architecture Aurix? This is where it helps to take a look at the existing devices in the AUDO (AUtomotive unifieD processOr) families. They contain a 32-bit super-scalar TriCore CPU with 4-stage pipeline in different versions as well as a 32-bit Peripheral Control Processor (PCP2) with its own instruction set. This can autonomously and bi-directionally transport data between peripherals and memory, pre-process and thus relieve the load of the main CPU.
Quite often, the PCP2 is used together with the General Purpose Timer Array (GPTA), with which various solutions for the areas time measurement, Capture/Compare of digital input signals up to complex algorithms, such as pulse width modulation (PWM), can be flexibly realized. This means that typical requirements for the applications mentioned above can generally be efficiently implemented.
The first Aurix architecture based MCU (TC275T) contains three TriCore processor cores (version 1.6). Two of these are optimized for maximum performance (high-performance TriCore CPU 1.6P) and can execute up to three instructions in one cycle at a maximum clock frequency of 200 MHz. With the third core, a high-efficiency TriCore CPU 1.6E, lowest possible power consumption and an efficient data exchange with the peripherals are the most important factors. This unit can execute a maximum of one instruction per cycle and is currently clocked at a maximum of 200 MHz. The three TriCore processor cores are connected over a crossbar running at the full CPU speed and avoiding hardware contentions.
The total of 4 MByte program flash memory comprise two 2 MByte banks with an independent read interface, which allows simultaneous flash access from two CPUs without speed limitations. Boot ROM, data flash banks with EEPROM emulation, and SRAM as core-local memory are implemented as additional memories. All memories are equipped with both error detection code (EDC) and error correction code (ECC) and thus well suited for automotive safety applications.
A Memory Protection Unit (MPU) that stretches over the whole address space (also that of the peripheral register) enables a simple separation of software. Therefore, it is possible to easily integrate several applications or tasks of an operating system and protect against mutual interference. Furthermore, the 65-nm flash technology, which is used for the first time, allows programming speeds up to 20 times faster than with devices in the AUDO family. This is especially important due to the increased amount of memory required by complex applications.
To read the complete article, which details the new Generic Timer Module, software tools, and performance, click here, courtesy of EE Times Europe Automotive.
TriCore?
Some of you are now thinking: Wait a minute, I know TriCore. This is not surprising. After all, TriCore was introduced for the first time more than ten years ago. Since then, the TriCore microcontroller architecture has been constantly developed further and has already been used in millions of electronic control units (ECUs) for a wide range of automobile applications such as the control of combustion engines, transmission control units, driver assistance systems, braking systems, airbags and chassis electronics. Furthermore, TriCore devices are used for the control of electric motors, inverters, and for battery management in electrical vehicles.
What is so revolutionary about the new TriCore-based 32-bit multicore architecture Aurix? This is where it helps to take a look at the existing devices in the AUDO (AUtomotive unifieD processOr) families. They contain a 32-bit super-scalar TriCore CPU with 4-stage pipeline in different versions as well as a 32-bit Peripheral Control Processor (PCP2) with its own instruction set. This can autonomously and bi-directionally transport data between peripherals and memory, pre-process and thus relieve the load of the main CPU.
Quite often, the PCP2 is used together with the General Purpose Timer Array (GPTA), with which various solutions for the areas time measurement, Capture/Compare of digital input signals up to complex algorithms, such as pulse width modulation (PWM), can be flexibly realized. This means that typical requirements for the applications mentioned above can generally be efficiently implemented.
The first Aurix architecture based MCU (TC275T) contains three TriCore processor cores (version 1.6). Two of these are optimized for maximum performance (high-performance TriCore CPU 1.6P) and can execute up to three instructions in one cycle at a maximum clock frequency of 200 MHz. With the third core, a high-efficiency TriCore CPU 1.6E, lowest possible power consumption and an efficient data exchange with the peripherals are the most important factors. This unit can execute a maximum of one instruction per cycle and is currently clocked at a maximum of 200 MHz. The three TriCore processor cores are connected over a crossbar running at the full CPU speed and avoiding hardware contentions.
The total of 4 MByte program flash memory comprise two 2 MByte banks with an independent read interface, which allows simultaneous flash access from two CPUs without speed limitations. Boot ROM, data flash banks with EEPROM emulation, and SRAM as core-local memory are implemented as additional memories. All memories are equipped with both error detection code (EDC) and error correction code (ECC) and thus well suited for automotive safety applications.
A Memory Protection Unit (MPU) that stretches over the whole address space (also that of the peripheral register) enables a simple separation of software. Therefore, it is possible to easily integrate several applications or tasks of an operating system and protect against mutual interference. Furthermore, the 65-nm flash technology, which is used for the first time, allows programming speeds up to 20 times faster than with devices in the AUDO family. This is especially important due to the increased amount of memory required by complex applications.
To read the complete article, which details the new Generic Timer Module, software tools, and performance, click here, courtesy of EE Times Europe Automotive.
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JDT
6/6/2012 9:03 AM EDT
After reading this article and then following the link to read the complete article at "EE Times Europe Automotive", I am left wondering why EE Times splits the U.S. "Automotive Designline" from the European version. I've often thought that "Automotive Designline" is missing a lot of news about what is going on in the industry, and at the European site I see a lot more interesting articles. EE Times, you should consider consolidating your automotive sites into a single global site. The industry itself is global, so why would an industry news organization split itself into regional sites?
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