datasheets.com EBN.com EDN.com EETimes.com Embedded.com PlanetAnalog.com TechOnline.com  
Events
UBM Tech
UBM Tech

Design Article

Using bullet-proof isoSPI data links to boost battery-management systems

By Jon Munson, Linear Technology Corp.

1/29/2013 1:05 PM EST

Device support


Figure 2(b) (above) shows the same functionality, but implemented with isoSPI. A small, inexpensive transformer replaces the data isolator to provide the galvanic barrier between the host processor elements and the battery pack potential. At the host microprocessor, a small adapter IC (LTC6820) provides the isoSPI master interface. The ADC units shown (LTC6804-2) include integrated isoSPI slave support so the only additional circuitry required is proper termination resistances that a balanced transmission-line structure requires. While the figure shows just two ADC units, up to sixteen can be serviced on a single extended isoSPI bus.


Figure 3: Alternative BMS configuration with isoSPI Daisy Chain

isoSPI Devices Support Multidrop Bus or Point-to-Point Daisy-Chain
The isoSPI links will of course work fine with simple point-to-point connections, and as shown in Figure 3, dual-port ADC devices (LTC6804-1) can form fully isolated daisy-chain structures. There is a similar overall structural complexity involved in either the bus or daisy-chain approach, so particular aspects of a design may favor one or the other depending on the subtleties involved. The daisy chain tends to be slightly less expensive, since it needs no address setting feature and generally involves simpler transformer couplings; whereas the parallel addressable bus has better fault-tolerance.





Please sign in to post comment

Navigate to related information

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)