Design Article
Car infotainment systems need multi-output power ICs
Nathan Hanagami, Steve Knoth and Marty Merchant, Linear Technology
3/5/2013 6:49 AM EST
Safety and reliability
The LTC3375 includes a system watchdog circuit that can be used to initiate an automatic system reset in the case where the microprocessor has become corrupted. The watchdog circuit monitors a microprocessor’s activity. The microprocessor is required to change the logic state of the watch dog timer input (WDI) pin at least once every 1.5 second in order to clear the watchdog timer and prevent the watchdog timer output (WDO) pin from signaling a timeout.
The watchdog timer begins running immediately after a power-on reset and will continue to run until a transition is detected on the WDI input. During this time, WDO will be in a high impedance (Hi-Z) state. Once the watchdog timer times out, WDO will be pulled low and the reset timer is started. If no WDI transition is received when the reset timer times out, after 200ms, WDO will again become Hi-Z and the 1.5 second watchdog reset time will begin again. If a transition is received on the WDI input during the watchdog timeout period, then WDO will become Hi-Z immediately after the WDI transition and the 1.5 second watchdog reset time will begin at that point.
WDO being pulled low may be used to force a reset on the controlling microprocessor. This reset can be implemented in a few ways. If it is desired to power down the whole system in a fault condition, then WDO may be tied to the KILL pin. In this case, WDO will pull KILL low and a Hard Reset will be initiated. After 200ms, if no transition is detected on WDI, then WDO will release KILL and the system will be allowed to power up again. In this case, it is important to note that the timing capacitor (CT pin) must be sized such that the system can power up and assert a WDI transition in less than 1.5s (the watchdog timeout time) minus the hard reset time (1s for a 0.01uF CT capacitor). If a less drastic system reset is desired, then the WDO pin may be used to pull down on the EN pins of any power supplies that are to be reset. In this case, the EN pins will be forced low for 200ms after which they will be released and can be driven high if so desired. It is important to note that the EN pins are not driven with a low impedance output.
Suppressing radiated & Conducted emissions
The LTC3375 PWM switching frequency is specifically trimmed to 2MHz with a guaranteed range of 1.8MHz to 2.2MHz with a 400k RT resistor. The RT resistor can be used to program any operating frequency between 1 and 3MHz. The regulators can also be set to a forced continuous PWM operating mode to prevent operation in Burst Mode operation even at light loads. This not only keeps the frequency fixed but also reduces voltage ripple on the DC-DC output capacitors. Further the LTC3375 can be synchronized with an external clock ranging from 1 to 3 MHz through the SYNC pin to further reduce system noise.
The LTC3375 includes a special feature which allows the user to slow down the switching edge rates to reduce radiated emissions. Source suppression uses layout/component selection to prevent the generation of radio frequency energy. It is necessary to use shielded inductors and to place those inductors as close to the LTC3375 as possible. This is because the AC currents circulate from the LTC3375 through the inductor and the output capacitor to ground and back to the LTC3375. From this it is also clear that wide traces, preferably area fill, be used to connect the ground of the output capacitors to the ground of the LTC3375 and to the ground of the associated VIN input decoupling capacitors as well.
The LTC3375 provides some additional tools for source suppression. The slew rate of the switch on the buck regulators can be adjusted, via I2C. Since the buck regulators are synchronous, both the fall and the rise time are then increased. Figure 2 and Figure 3 show plots of switching with full speed and reduced speed (respectively) rise and fall times:
Figure 3 is a plot of switching with reduced speed rise and fall times:
Figure 3: Buck regulator switching @2MHz, reduced speed rise & fall times
Click on image to enlarge
The LTC3375 includes a system watchdog circuit that can be used to initiate an automatic system reset in the case where the microprocessor has become corrupted. The watchdog circuit monitors a microprocessor’s activity. The microprocessor is required to change the logic state of the watch dog timer input (WDI) pin at least once every 1.5 second in order to clear the watchdog timer and prevent the watchdog timer output (WDO) pin from signaling a timeout.
The watchdog timer begins running immediately after a power-on reset and will continue to run until a transition is detected on the WDI input. During this time, WDO will be in a high impedance (Hi-Z) state. Once the watchdog timer times out, WDO will be pulled low and the reset timer is started. If no WDI transition is received when the reset timer times out, after 200ms, WDO will again become Hi-Z and the 1.5 second watchdog reset time will begin again. If a transition is received on the WDI input during the watchdog timeout period, then WDO will become Hi-Z immediately after the WDI transition and the 1.5 second watchdog reset time will begin at that point.
WDO being pulled low may be used to force a reset on the controlling microprocessor. This reset can be implemented in a few ways. If it is desired to power down the whole system in a fault condition, then WDO may be tied to the KILL pin. In this case, WDO will pull KILL low and a Hard Reset will be initiated. After 200ms, if no transition is detected on WDI, then WDO will release KILL and the system will be allowed to power up again. In this case, it is important to note that the timing capacitor (CT pin) must be sized such that the system can power up and assert a WDI transition in less than 1.5s (the watchdog timeout time) minus the hard reset time (1s for a 0.01uF CT capacitor). If a less drastic system reset is desired, then the WDO pin may be used to pull down on the EN pins of any power supplies that are to be reset. In this case, the EN pins will be forced low for 200ms after which they will be released and can be driven high if so desired. It is important to note that the EN pins are not driven with a low impedance output.
Suppressing radiated & Conducted emissions
The LTC3375 PWM switching frequency is specifically trimmed to 2MHz with a guaranteed range of 1.8MHz to 2.2MHz with a 400k RT resistor. The RT resistor can be used to program any operating frequency between 1 and 3MHz. The regulators can also be set to a forced continuous PWM operating mode to prevent operation in Burst Mode operation even at light loads. This not only keeps the frequency fixed but also reduces voltage ripple on the DC-DC output capacitors. Further the LTC3375 can be synchronized with an external clock ranging from 1 to 3 MHz through the SYNC pin to further reduce system noise.
The LTC3375 includes a special feature which allows the user to slow down the switching edge rates to reduce radiated emissions. Source suppression uses layout/component selection to prevent the generation of radio frequency energy. It is necessary to use shielded inductors and to place those inductors as close to the LTC3375 as possible. This is because the AC currents circulate from the LTC3375 through the inductor and the output capacitor to ground and back to the LTC3375. From this it is also clear that wide traces, preferably area fill, be used to connect the ground of the output capacitors to the ground of the LTC3375 and to the ground of the associated VIN input decoupling capacitors as well.
The LTC3375 provides some additional tools for source suppression. The slew rate of the switch on the buck regulators can be adjusted, via I2C. Since the buck regulators are synchronous, both the fall and the rise time are then increased. Figure 2 and Figure 3 show plots of switching with full speed and reduced speed (respectively) rise and fall times:
Figure 2: Buck regulator switching @2MHz with full speed rise & fall times
Click on image to enlarge
Click on image to enlarge
Figure 3 is a plot of switching with reduced speed rise and fall times:
Figure 3: Buck regulator switching @2MHz, reduced speed rise & fall times
Click on image to enlarge
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