SoC silicon--Page 2.
The OpenFlow standard is emerging as a key enabler of software defined network. OpenFlow is based on the concept of separation of the data and control planes. A similar separation strategy has been successfully deployed with telecom soft switches for control of media gateways (MGW) over the last decade. OpenFlow provides an open interface for Ethernet traffic switching, and switch management that can be centralized instead of determined by individual routers as its currently done in today’s network. This enables network operators to optimize the network investment, reduce the network hardware cost and enable innovative new network applications and services based on flows.
The embedded networking in the SoCs will evolve to support OpenFlow with external software controls and a control protocol to define data flows by applying dynamic configurable flow tables that direct the network traffic. Once OpenFlow enabled SoCs are in place, the ability to use software to control the network traffic routing will enable network managers to deploy new protocols and strengthen network security and resiliency. Additionally, network managers will be able to control the network topology to manage quality of service (QoS), without extensive hardware changes. Integrating Ethernet switching into the SoC eliminates the need for external switches and reduces hardware cost and complexity, resulting in increased system scalability. SoC based solutions combining processing and networking will ultimately deliver the highest performance and interconnect bandwidth per watt and provide the best way to scale both application processing and network capacity.
The following figure shows an example of scalable SoC hardware architecture that will unlock the potential of the future network.
There are several emerging SoC solutions that will enable networks to keep up with the explosive capacity demands now being placed on networks. Powerful SoC based hardware will enable network flows rather than routing protocol rules to dynamically control connectivity, secure access and priority. Traffic shaping and policing will be coupled with high-performance packet processing and switching hardware. These network elements will be embedded with DSP and ARM RISC processing elements so that high-performance application processing is no more than a tick away from the network. Ironically, the evolution of SoC hardware will drive the soft network revolution.
About the Authors
Zhihong Lin is a strategic marketing manager for Texas Instruments’ multicore processors group, responsible for defining and planning key requirements for multicore SoCs. Lin joined TI as a software design lead for the industry's first integrated RF and baseband mobile DTV receiver in 2005. She has over 18 years of experience in the communications and networking industries and authored multiple technical papers on multicore technology and applications. Lin holds an M.S. in electrical engineering from the University of Texas at Dallas.
Tom Flanagan is the director of technical strategy for Texas Instruments’ multicore processors group. He has also served as technical strategy director for TI’s digital signal processing systems and broadband communications businesses. In his current role, he identifies market trends and provides the vision and strategic direction for TI’s multicore group. Flanagan has an extensive background in the semiconductor industry and in voice and data networking, and holds several patents. Flanagan received his bachelor’s degree of science from James Madison University.
Pekka Varis, CTO for the Texas Instruments’ multicore processors group drives the company’s strategy and development efforts for packet-based multicore processing. Varis played a key role in developing TI’s Multicore Navigator, a unique system element of TI’s new KeyStone multicore architecture. He has over 14 years of experience in the communications infrastructure industry including implementing platform software and architecting data plane blades for mobile networks. Varis holds an M.S. in Electrical Engineering from the Helsinki University of Technology and is a member of group technical staff at TI.