Handicapping the field of possible MIPS suitors
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The growing use of programmable logic in mobile handsets
Thinking forward
Top 10 Tips for Success with Formal Analysis – Part 3
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How to use the CORDIC algorithm in your FPGA design
It's a vision thing – creating an optical computer memory
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Design for reliability – the golden age of simulation driven product design
Unveiling the next generation of wireless apps with FRAM-based MCUs
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Time is money! A quick fix for those pesky FPGA design errors
Book Excerpt: How to engineer EM circuits, Part 1
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Sophisticated thermal management solutions cool hi-rel systems - Part 2
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Hierarchical methods for power intent specification
A/D Converter → FPGA → D/A Converter: The JESD204/A/B Standard – “Where the rubber meets the road”
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Xilinx unveils vivado design suite for the next decade of 'All Programmable' devices
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Hi, I'm Brian Bailey and I'm the editor of the EDA DesignLine. If you are interested in submitting a technical article, blog or product announcement, or just want to reach out say hello, you can call me at 503-352-4336 or email me at 