EDA Design Features

Book excerpt – The art of hardware architecture, part 4

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Comparing FMCs with PMCs/XMCs for harsh environments (Part 2)

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Location Is Everything: Improving Performance with Interactive LDE Estimation

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Comparing FMCs with PMCs/XMCs for harsh environments (Part 1)

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How to build a microcontroller-based functional tester

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Book excerpt – The art of hardware architecture, part 3

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The Fast Track to 3D-IC Testing

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Book excerpt – The art of hardware architecture, part 2

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How formal MDV can eliminate IP integration uncertainty

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Book excerpt – The art of hardware architecture, part 1

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HW/SW co-development (with finally some emphasis on software)

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Reducing signoff corners to achieve faster 40 nm SOC design closure

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Top 10 automotive electronics stories of 2011

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Single event effects (SEEs) in FPGAs, ASICs, and processors, part II: mitigation

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Critical Area Analysis and Memory Redundancy

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Technical Papers

Mechatronic System Modeling and Simulation Techniques

Using 10-Gbps Transceivers in 40G/100G Applications

An Automated Physical Design Flow Architecture

Embedded System Power Consumption: A Software or Hardware Issue?

Courses and Webinars

Power Architecture Solutions for Industrial Control

Reliability and Qualification of MTP NVM IP from Commercial to Automotive Applications

Fundamentals of Measurement

Fundamentals of USB

Fundamentals of Analog Verification

Teardowns

Wide Bluetooth, Wi-Fi adoption seen in handsets

Inside Xbox 360's Kinect controller

More Design Teardowns >

Reference Designs

Quantenna debuts 802.11n 4x4 MIMO wireless video bridge ref design

Quantenna Communications Inc. has debuted a complete reference design based on its QHS600 IEEE 802.11n wireless LAN (WLAN) 4x4 multiple input, multiple output (MIMO) chipset.
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Lattice adds over 90 reference designs for PLDs

Lattice Semiconductor Corp. has released more than 90 reference designs optimized for the MachXO and ispMACH 4000ZE PLDs.
Learn more >

More Reference Designs >

Products

Samplify Systems announces APAX application acceleration technology

Xilinx announces ISE Design Suite 13.4

Real Intent upgrades Clock Domain Crossing product

Huawei's MediaPad Now Comes with Android 4.0

HTML5 platform for infotainment systems debuts at CES

Dual-image sensor stereo camera FPGA-based reference design from Lattice and Aptina

Microsemi and INVIA deliver DPA-resistant cryptographic software on SmartFusion FPGAs

CAST introduced UDP hardware IP block

Microsemi announces Libero SoC v10.0 IDE

All members of Lattice’s MachX02 “Do-It-All” PLD family now in production

Commentary

That Was Tricky! Where were our wireless packets?

Clive Maxfield

Why did the wireless network shut down when the production line started up?

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What were they thinking: Google is at it again

Brian Bailey

Are you worried about how much data the government has about you, well don’t worry, because Google has SO much more…

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Stand Back! I have a robotic ball (and I’m not afraid to use it)!

Clive Maxfield

Do you recall my recent column “I want robotic balls”? Well, I now have one of my very own (“…my precious, my precious…”)

Join  post comment   5 comments    last comment  Max the Magnificent
Someone coming into this conversation late might wonder just what it is we are all talking about :-)

DesignCon Panel: Is it time for an analog comeback?

Brian Bailey

Organizing panels is a balancing act between making sure the panelists have enough in common and yet not quite agreeing…

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CAST to host free 32-bit system development breakfast at DesignCon

Clive Maxfield

I just heard from the folks at CAST that they are going to host a free breakfast and hands-on seminar at DesignCon 2012...

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Xilinx unveils latest and greatest 28nm 7 Series FPGAs at DesignCon 2012

Clive Maxfield

In addition to demoing their latest FPGAs, the folks from Xilinx will also be discussing stacked silicon interconnect technologies…

Join  post comment   1 comment    last comment  Max the Magnificent
I really think that once embedded designers have started to play with them, new devices like the ...

Upcoming Conferences: calls and more – Jan 26th

Brian Bailey

Conference related information, calls for papers, contributions and participation are all found here…

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Recent Comments

AussieNeil  01.27.2012
Controller PCB problem solved
I've seen the same problem with a LM324 op amp die shrink. Reduced yield problems were directly ...
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BobsUrUncle  01.27.2012
Relevance of power supplies
These decisions are usually made by a semi skilled person called a "component engineer". As long as ...
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Most Commented

Time to play hard ball on tech manufacturing

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January 2012 caption contest: Tee time

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Reader Message Boards

News, Analysis, and Opinion

Microsoft keynoter to DesignCon attendees: 'Believe!'

Day 3 DesignCon keynote: The future is optics

AMD’s Joe Macri challenges DesignCon attendees to embrace the future

Counting down to the EOTWAWKI

EE Times' top ten cloud stories in 2011

ESL, down under style

ST-Ericsson describes three-chip stack

Accellera + OSCI = what exactly?

Agilent to buy device-modeling specialist

3-D IC confab to look at commercial opportunities

 

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Hi, I'm Brian Bailey and I'm the editor of the EDA DesignLine. If you are interested in submitting a technical article, blog or product announcement, or just want to reach out say hello, you can call me at 503-352-4336 or email me at brian_bailey@acm.org.

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