Signal processing is everywhere. Not only is it becoming an ever-larger component of electronic systems, it is the basis for a majority of the new SoC designs that are driving the semiconductor market: cellular infrastructure, wireless LAN, HDTV, MP3 players, digital cameras, cable and DSL modems, just to name a few.

What is the design entry environment for these hot new SoCs? SystemC? C/C++? SystemVerilog? No! It's MATLAB! With the explosion of signal processing-based semiconductor markets, The MathWorks' MATLAB has become the predominant design entry language for next-generation SoCs. In fact, many leading-edge communication ASIC groups describe their entire chip and testbench in MATLAB. It's a position that SystemC and SystemVerilog have only dreamed of.

Why MATLAB? The intellectual property for many of these new ICs is not embodied in an RTL implementation, but rather in novel algorithms. For example, many of the groups developing WiMax ICs are competing more on the strength of their demodulation algorithms than on the efficiency of their RTL. As a result, comprehensive algorithm exploration and simulation is much more important in the design process. Enter MATLAB. Its M language provides a natural interface for signal processing designers to develop their algorithms. Its vector-based language, library of pre-developed functions and graphing and visualization tools allow designers to rapidly describe and tune their systems.

Though MATLAB is the de facto standard for design entry of signal processing systems, does that make it a great ESL language? No! While MATLAB has extremely high adoption and is great for algorithm exploration, it is ill-suited for an implementation flow.

A typical signal processing design flow starts with a floating-point system description in MATLAB. This floating-point model is used for algorithm exploration. Once the algorithms are finalized, the floating-point MATLAB model is manually translated to a floating-point C-code model. The transition to C-code is required for two reasons: simulation speed and algorithm conversion to fixed-point. Next, the floating-point C-code is quantized and manually converted to a fixed-point C-code model. Unfortunately, a C-code description of an algorithm is too low an abstraction for quantization. As a result, the quantization process is often ad hoc and results in conservative results (which lead to wider datapaths that consume more power and area in the final implementation). This fixed-point C-code model is then used in an RTL verification flow. This process requires a tedious manual language conversion which is prone to error. In addition, the final fixed-point C-code is divorced from the original MATLAB design, so any algorithm changes must also go through the tedious manual conversion.

Figure 1:  Traditional Design Process

A more efficient, correct-by-construction design flow would still start with a system description in floating-point MATLAB. However, this flow would use fixed-point data types to enable fixed-point system modeling in MATLAB. Since quantization now occurs at a higher abstraction, analysis tools can aid the designers to efficiently convert their design to fixed-point. Additionally, a fast simulation engine (using compiled-code simulation, for example) would enable entire system simulations of this fixed-point model. This fixed-point MATLAB model could then be used as a functional verification model for an RTL-based design.

This design flow is highly automated and eliminates time-consuming manual language conversions. There is a single "golden" model of the system that is described in MATLAB, the algorithm developer's preferred language. In addition, this design flow enables users to quickly adapt to algorithm modifications late in the design process.

Figure 2:  Correct-by-Construction Design Process

With all its warts, signal processing SoC design groups today mostly use the former development flow. Given that signal processing is at the core of a majority of ASIC designs today, MATLAB has quietly already overcome the hardest challenge facing ESL language candidates: designer adoption. MATLAB's the sleeper algorithm exploration environment of leading edge SoCs! Meanwhile, the rest of the EDA industry is focused on C/C++, SystemC, and System Verilog. Try to convince an ASIC design group competing in the highly competitive WiMax market to use SystemC for algorithm design and RTL verification - it's next to impossible.

To support these leading edge SoC designers, Catalytic, Inc. is taking steps to streamline a MATLAB-based design and verification flow that is already used by many design groups.

As an added bonus, MATLAB's use as a design entry language is not limited to SoC design groups. Its concise representation of mathematical computation makes it possible, for example, to have tools that synthesize software for a digital signal processor or reconfigurable datapath architecture from a MATLAB description. The emergence of these tools would give designers the ability to target multiple implementation styles from a single system description, thus making MATLAB a true "Electronic System Level" language.