Design Article
Front-end design methodologies must address the challenges of today's process technologies and economic realities
Chi-Ping Hsu and Andy Eliopoulos, Cadence Design Systems, Inc.
10/23/2006 9:21 AM EDT
No longer can front-end design teams merely "design for" something (design-for-test being the most widely recognized) or make others responsible for that something (tail-end verification being a classical example). There are four principle areas, intricately interconnected, in which logic design teams are facing challenges great enough to accelerate changing the long tried and true tools, flows and methodologies that have been in use for a decade or more. Instead, these teams must "design with" that same something. Previously, "design for" has meant a serial, or side excursionary step in the design flow. The design process must evolve to be holistic and continuous in its treatment of these design issues, and consider all of these aspects simultaneously.
Verification, power, test, and physical effects now require new attention by the front-end design team in order to prevent program failure, or minimally, severe delays. Further, the complex relationship between these areas is demanding changes in the hand-off/sign-off practices as well as overall plan and metrics driven project flow management practices to maximize the odds of a successful tapeout.
As the functional content of the average chip continues to escalate, it is no secret that the functional validation task has escalated in a likewise manner. At the same time, power has become a primary design concern and often a primary product value criteria. At 90nm and below, power has reached a critical stage, where action must be taken, almost irrespective of the end market. Consumer markets and brand value drive the need for high quality, and therefore adequate screening prior to deployment. The need to reach the quality standards, given many new failure mechanisms and attrition of some beloved simple catch-all methods (read Iddq testing), demands new types of testing that in turn dictate embedding new types of test structures. The growing stress on tape-out schedules has been exacerbated at the adoption point of each successive process node.
No, the sky is not falling, but it is starting to rain! The real complexity comes from the interrelationship between these areas. The intricacies of the interactions are multi-faceted, which compounds risk and diminishes predictability. A simplistic, single faceted example can be used to illustrate the rippling effects that can trigger a tsunami of program woes.
Escalating the issues " power
Consider a 90nm chip that requires the use of multiple supply voltages and power shut-off capability to reduce its operational and standby current levels, which will increase battery life, which in turn improves end product value. Ideally, minimizing power in an optimal fashion will push the entire design to a timing critical stage (any non-timing critical region, it can be argued, is wasting energy). Design teams that use over constraining as the method of managing the downstream physical effects of wires are thus wasting energy and detracting from the end product value. Instead of a blanket approach, such as over constraining the entire design, design teams must increase the accuracy of their physical modeling. Thus, designing with power and design with physical effects are intimately interwoven.
Having multiple power domains that can power down represents new and unique challenges to functional validation and test. Waiting to validate and verify the functional implications of the power control structures in a design is a risky proposition. By the time a full transistor netlist is available, the project clock has ticked down to crunch time. Design teams must adopt methods to model and validate power intent, which further complicates an already acutely critical issue. In the same vane, the design for test strategies needed for highly timing critical designs that employ advanced low power techniques adds new dimensions to the complexity of designing with test, which also impacts physical design, timing closure, and power (Figures 1 and 2).
Architecting a solution
RTL designers provide the fountain from which successful chip projects flow. Conversely they can also sow the bad seeds of programs fraught with problems, delays and failures. In other words, how a project starts is pretty instrumental in its ultimate success or failure. Minimizing risks faced by logic design teams means upgrading the front-end flow from the evolutionary set of technologies of the industry's current front-end offerings. A new approach to solving growing challenges is needed, addressing flow bottlenecks and inefficiencies in standard production flow (Figure 3). The right solution for RTL design teams can address these challenges and reduce overall risks with:
- "Design with Power"—power-aware design, verification, and implementation flows are now a must to remain competitive in the evolving global market.
- "Design with Verification"—delivering on the promise of early verification by design teams to shorten the overall time to market, while significantly raising design functional quality.
- "Design with Physical"—reducing the logic-physical late iterations by elevating the level of abstraction to design teams.
- "Design with Test"—accelerating development of high quality test infrastructure and enables design team to minimize cost of test.
- "Design Logical Signoff"—helping with a backend handoff checkpoints for design teams to achieve front-end signoff closure quickly and accurately, improving quality.
- "Design Management"—providing a plan and metrics-driven flow across the entire design and verification tool set, and bringing unparalleled predictability from plan to closure.
Because of the ever increasing intertwining of the power, verification, test, and physical modeling design issues, the challenge for the design team is to bring all of these elements to bear on the whole design problem. A holistic approach is critical to achieving a successful outcome. While all of these issues are virtually inseparable, some further background on each should help to catalyze a clear path to action.
Next: Design with power
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