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Making the most of the system level in analog design
Andrew Betts, Nicolas Delorme, Asygn SAS (Montbonnot, France)
6/28/2010 6:44 PM EDT
From the circuit simulator point of view, the system level has been the poor relation – just think of all the highly optimized variants of SPICE that are out there. In particular, since system analysis is done at a high level of abstraction and runtimes are relatively short, runtime efficiency for analog system simulators is often neglected. Opportunities for deeper and more comprehensive analyzes are missed.
Dealing with these two issues – the separation of specification from implementation and the lack of optimization in analog system tools – results in significant benefits to the whole analog design flow, from specification through implementation to silicon test.
As we show in this article, a small investment at the system level can result in huge overall benefits to Analog/Mixed-Signal/Radio Frequency (RF) projects.
To read the full article, click here.
About the authors:
. Andrew Betts is Consultant Director of Sales and Field Operations at Asygn SAS, based near
Grenoble, France (www.asygn.com). He has a PhD in Analog IC Design over 20 years experience of
the microelectronics field. His consulting company is Iconda Solutions (www.icondasolutions.com).
. Nicolas Delorme is Chief Technical Officer of Asygn SAS (www.asygn.com). He has a PhD in Analog IC Design and is a specialist in the field of sensor and actuator microsystems. A founder of Asygn, he has been responsible for the implementation of the company’s analog simulator products.
A courtesy of EE Times Europe.
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