Design Article
Managing coverage grading in complex multicore microprocessor environments
James Young and Michael Sanders, AMD Inc., Paul Graykowski and Vernon Lee, Synopsys Inc.
1/19/2011 9:19 AM EST
Applying Quickgrade
At the conclusion of the next full coverage regression, AMD submitted a list of 40,000+ directed tests, sorted by the estimated run time of the test, against the Quickgrade program in an effort to determine an optimized list of tests. Extrapolating from the original tests with the full grading algorithm, it was estimated that this list of tests would take in excess of five months to evaluate this same list. The Quickgrade algorithm evaluated this list in 18 days, which is over eight times faster.
Given the resulting sorted list of tests from the Quickgrade program, a list of 1,000 tests was created for evaluation of the effectiveness of the grading algorithm. A regression was then run against the list of tests with the same model used in the full regression in order to collect the coverage of this optimized list. The coverage generated as a result of running this was 92.4 percent of the overall coverage number. With this list of tests, AMD was able to capture more than 90 percent of the coverage measured by the full regression list using a regression that runs in a matter of a days rather than weeks.
This test list strategy has been implemented by AMD with all ongoing and forward-looking projects. This optimized test list is used across multiple functions, from picking tests for gate simulations, major qualification runs and picking an initial set of patterns to generate test vectors from. By reducing the generation of the optimized test list from months to weeks, the test list is delivered in time to be useful prior to tapeout and provides support for post-tapeout regressions.
Conclusions
The Quickgrade custom coverage grading application trades off optimal test grading for dramatically reduced run time. Within a tight development schedule, this trade-off delivers faster verification results because the time gained with approximate grading provides faster regression turn-around. Quickgrade has been adopted as an important component of AMD's coverage flow. Furthermore, its technology has been productized as part of the VCS tool suite, enabling the broader SoC user community to benefit from near-optimal test lists of improved coverage in much less time.
About the authors:
. Michael Sanders is manager SOC verification infrastructure at AMD Inc.
Michael Sanders is responsible for verification infrastructure support across AMD's server and mainstream-client SOC microprocessor programs.
. James Young is senior verification engineer at AMD Inc.
James Young is a verification engineer with over ten years of experience at Compaq, Hewlett-Packard and AMD. He has worked in pre-silicon verification, DVE and post-silicon test and validation.
. Vernon Lee is principal R&D engineer at Synopsys Inc.
Vernon has worked in EDA tool development for twenty years, since receiving his Ph.D. from Rice University. He has worked on coverage tools for the last several years as part of the Verification Group at Synopsys.
. Paul Graykowski is senior staff corporate applications engineer at Synopsys Inc.
Paul Graykowski specializes in testbench methodology and coverage closure. Prior to Synopsys, Paul was a Verification Lead at Eureka Software Solutions, and a Design Engineer at Intel and Compaq.
At the conclusion of the next full coverage regression, AMD submitted a list of 40,000+ directed tests, sorted by the estimated run time of the test, against the Quickgrade program in an effort to determine an optimized list of tests. Extrapolating from the original tests with the full grading algorithm, it was estimated that this list of tests would take in excess of five months to evaluate this same list. The Quickgrade algorithm evaluated this list in 18 days, which is over eight times faster.
Given the resulting sorted list of tests from the Quickgrade program, a list of 1,000 tests was created for evaluation of the effectiveness of the grading algorithm. A regression was then run against the list of tests with the same model used in the full regression in order to collect the coverage of this optimized list. The coverage generated as a result of running this was 92.4 percent of the overall coverage number. With this list of tests, AMD was able to capture more than 90 percent of the coverage measured by the full regression list using a regression that runs in a matter of a days rather than weeks.
This test list strategy has been implemented by AMD with all ongoing and forward-looking projects. This optimized test list is used across multiple functions, from picking tests for gate simulations, major qualification runs and picking an initial set of patterns to generate test vectors from. By reducing the generation of the optimized test list from months to weeks, the test list is delivered in time to be useful prior to tapeout and provides support for post-tapeout regressions.
Conclusions
The Quickgrade custom coverage grading application trades off optimal test grading for dramatically reduced run time. Within a tight development schedule, this trade-off delivers faster verification results because the time gained with approximate grading provides faster regression turn-around. Quickgrade has been adopted as an important component of AMD's coverage flow. Furthermore, its technology has been productized as part of the VCS tool suite, enabling the broader SoC user community to benefit from near-optimal test lists of improved coverage in much less time.
About the authors:
. Michael Sanders is manager SOC verification infrastructure at AMD Inc.
Michael Sanders is responsible for verification infrastructure support across AMD's server and mainstream-client SOC microprocessor programs.
. James Young is senior verification engineer at AMD Inc.
James Young is a verification engineer with over ten years of experience at Compaq, Hewlett-Packard and AMD. He has worked in pre-silicon verification, DVE and post-silicon test and validation.
. Vernon Lee is principal R&D engineer at Synopsys Inc.
Vernon has worked in EDA tool development for twenty years, since receiving his Ph.D. from Rice University. He has worked on coverage tools for the last several years as part of the Verification Group at Synopsys.
. Paul Graykowski is senior staff corporate applications engineer at Synopsys Inc.
Paul Graykowski specializes in testbench methodology and coverage closure. Prior to Synopsys, Paul was a Verification Lead at Eureka Software Solutions, and a Design Engineer at Intel and Compaq.
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