datasheets.com EBN.com EDN.com EETimes.com Embedded.com PlanetAnalog.com TechOnline.com  
Events
UBM Tech
UBM Tech

Design Article

The best of both worlds

Jafar Safdar, Synopsys, Inc.

5/31/2011 3:40 AM EDT

Summary
While datapath designers have been using custom techniques such as tiling to achieve aggressive PPA targets, flow complexity and long project schedules make custom techniques unsuitable for mainstream designers. IC Compiler’s Physical Datapath capability has enabled designers to achieve custom PPA targets with predictable and shorter time-to-results. Physical datapath has found increasing usage with mainstream designers as evidenced by the design examples presented. With the semiconductor industry moving toward 40/32/28nm nodes, aggressive PPA targets, greater use of on-chip IP, and shorter design schedules, it is expected that the usage of physical datapath technology will continue to grow and proliferate.

About the author:
Jafar Safdar is a product marketing manager for IC Compiler at Synopsys. Over the past 15 years, he has held various application engineering and marketing positions at Synopsys. He holds a master’s in electrical engineering from the California State University Northridge.




Daniel Payne

6/2/2011 10:32 AM EDT

Good article, datapath and compiled layout makes a lot of sense. In fact an entire company was formed around this very concept called Silicon Compilers in the 1980s, then acquired by Mentor in the early 1990s. There were two compiler tools: Genesil and GDT. Earlier while at Intel I wrote my own layout compilers to produce parts of a Graphics Chip automatically.

Sign in to Reply



Please sign in to post comment

Navigate to related information

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)