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hm
@Bart: Very interesting analysis an information for ESD. I have one query. Many ...
On-chip ESD protection for High Voltage applications in TSMC BCD technology
B. Keppens, K. Verhaege
3/5/2012 10:14 AM EST
BCD technology
Most foundries provide a complete portfolio of process technologies and options targeted at high-voltage applications like display driver ICs, power management, and automotive applications. Process options typically include high-voltage capacitors, resistors, Zener diodes, and thick top metals. Ultra-High Voltage (UHV) options ranging from 500 to 800 V are also available for "green technology" switching mode power supply designs. The power management market in particular is quickly growing as every electronic device needs one. Bipolar-CMOS-DMOS (double-diffused MOS) – or BCD – platforms are good candidates for all kinds of automotive ICs, another fast-growing segment.
In high-voltage IC applications, process flexibility is an important aspect. Every high-voltage interface has its own set of requirements; each project is different. Therefore TSMC has defined a modular approach where IC designers can select the most appropriate modules and voltage domains. In the 0.25um BCD platform for instance designers can use different transistor modules (2.5V, 5V, 12V, 24V, 40V and 60V) and have 3 options for the core gate voltage (2.5, 5 or 12V).
Sofics has compared different protection concepts first on TSMC’s 0.35-µm 15-V process. Next, with the help of TSMC9000™ IP and Library/IP Quality Management Program LQMP divisions, Sofics has performed a full characterization on TSMC’s 0.25-µm BCD and 0.18-µm BCD platforms.
Comparison of traditional ESD solutions
Today IC designers use a variety of ESD protection devices to protect integrated circuits against ESD stress. The following non-exhaustive overview highlights the main types.
1. Zener diodes
Zener-based protection devices have been around for a long time. The characteristic behavior is depicted in Figure 5 (type ‘a’). The breakdown and holding voltage are above the supply voltage level ensuring latch-up-immune ESD protection. Zener diodes can be applied in many technology nodes, though there are many drawbacks for ESD protection:
This dynamically-triggered MOS transistor is extensively used in low-voltage technology nodes for general-purpose I/O libraries [19, 20]. The characteristic behavior is depicted in Figure 5 (type ‘b’). The MOS device is biased such that all the ESD current is shunted in the active MOS conduction mode while it is turned off during normal operation. Many different configurations exist to tune the device behavior (timing, boosted bias, false-trigger prevention). However, in high-voltage technologies, the application of RC-MOS devices is less straightforward, typically leading to large area consumption, even for a low ESD HBM protection level [21, 22].
3. PMOS, PNP
The HV-PMOS device has a characteristic similar to the Zener device (Figure 5, type ‘a’), however the ESD performance is very process-dependent. In ‘good’ technology nodes, the robustness level per micron device width is higher than the Zener device due to the bipolar PNP action. This results in a somewhat better performance for the leakage and silicon area consumption. Moreover, due to a lower breakdown and holding voltage as compared to the Zener diode, the device is typically better suited to protect sensitive circuits.
4. NMOS, NPN
Designers use NMOS and NPN based approaches because the It2 robustness level is higher compared to the 3 previous device types, leading to smaller silicon area and reduced leakage. However, degradation issues due to non-uniform triggering are a major problem, as reported and documented by various sources (see Figure 4) [5, 17, 23]. In addition, a key issue is latch-up weakness due to a low holding voltage, typically far below the supply voltage. This characteristic behavior is depicted in Figure 5-c.
5. SCR
Finally, for some high-voltage signal pins it is possible to rely on Silicon Controlled Rectifier (SCR)-based protection devices [5, 24]. SCRs have superb ESD characteristics with low leakage and low capacitance but require careful holding and trigger current control to avoid latch-up problems [14]. The characteristic behavior of the basic SCR device is depicted in Figure 5 (type ‘d’) while an improved latch-up high-holding-current (HHI) SCR approach is shown as type ‘e’ [14, 17, 25, 26].
This overview is based on benchmarking of devices across high-voltage technologies from various foundries and IDMs. Exceptions exist where, e.g., a process is modified to enhance the ESD properties of the Zener diode [5]. Clearly, within the existing device pool there is no generic and no optimal solution. It basically comes down to a selection between a cost-effective design (NPN, SCR) with major latch-up immunity weakness or a guaranteed latch-up-immune design that occupies a huge chip area (Zener diode, PMOS). A single, generic device that solves all the different aspects would greatly simplify IC design in HVCMOS and BCD process technology.

Most foundries provide a complete portfolio of process technologies and options targeted at high-voltage applications like display driver ICs, power management, and automotive applications. Process options typically include high-voltage capacitors, resistors, Zener diodes, and thick top metals. Ultra-High Voltage (UHV) options ranging from 500 to 800 V are also available for "green technology" switching mode power supply designs. The power management market in particular is quickly growing as every electronic device needs one. Bipolar-CMOS-DMOS (double-diffused MOS) – or BCD – platforms are good candidates for all kinds of automotive ICs, another fast-growing segment.
In high-voltage IC applications, process flexibility is an important aspect. Every high-voltage interface has its own set of requirements; each project is different. Therefore TSMC has defined a modular approach where IC designers can select the most appropriate modules and voltage domains. In the 0.25um BCD platform for instance designers can use different transistor modules (2.5V, 5V, 12V, 24V, 40V and 60V) and have 3 options for the core gate voltage (2.5, 5 or 12V).
Sofics has compared different protection concepts first on TSMC’s 0.35-µm 15-V process. Next, with the help of TSMC9000™ IP and Library/IP Quality Management Program LQMP divisions, Sofics has performed a full characterization on TSMC’s 0.25-µm BCD and 0.18-µm BCD platforms.
Comparison of traditional ESD solutions
Today IC designers use a variety of ESD protection devices to protect integrated circuits against ESD stress. The following non-exhaustive overview highlights the main types.
1. Zener diodes
Zener-based protection devices have been around for a long time. The characteristic behavior is depicted in Figure 5 (type ‘a’). The breakdown and holding voltage are above the supply voltage level ensuring latch-up-immune ESD protection. Zener diodes can be applied in many technology nodes, though there are many drawbacks for ESD protection:
- The ESD robustness level per micron device width is rather low, which leads to a large device size.
- The large device size means that the capacitance and leakage values are higher than any other device type when scaled to the same protection level.
- For many circuits, the Zener device cannot provide effective protection due to too high a holding voltage.
This dynamically-triggered MOS transistor is extensively used in low-voltage technology nodes for general-purpose I/O libraries [19, 20]. The characteristic behavior is depicted in Figure 5 (type ‘b’). The MOS device is biased such that all the ESD current is shunted in the active MOS conduction mode while it is turned off during normal operation. Many different configurations exist to tune the device behavior (timing, boosted bias, false-trigger prevention). However, in high-voltage technologies, the application of RC-MOS devices is less straightforward, typically leading to large area consumption, even for a low ESD HBM protection level [21, 22].
3. PMOS, PNP
The HV-PMOS device has a characteristic similar to the Zener device (Figure 5, type ‘a’), however the ESD performance is very process-dependent. In ‘good’ technology nodes, the robustness level per micron device width is higher than the Zener device due to the bipolar PNP action. This results in a somewhat better performance for the leakage and silicon area consumption. Moreover, due to a lower breakdown and holding voltage as compared to the Zener diode, the device is typically better suited to protect sensitive circuits.
4. NMOS, NPN
Designers use NMOS and NPN based approaches because the It2 robustness level is higher compared to the 3 previous device types, leading to smaller silicon area and reduced leakage. However, degradation issues due to non-uniform triggering are a major problem, as reported and documented by various sources (see Figure 4) [5, 17, 23]. In addition, a key issue is latch-up weakness due to a low holding voltage, typically far below the supply voltage. This characteristic behavior is depicted in Figure 5-c.
5. SCR
Finally, for some high-voltage signal pins it is possible to rely on Silicon Controlled Rectifier (SCR)-based protection devices [5, 24]. SCRs have superb ESD characteristics with low leakage and low capacitance but require careful holding and trigger current control to avoid latch-up problems [14]. The characteristic behavior of the basic SCR device is depicted in Figure 5 (type ‘d’) while an improved latch-up high-holding-current (HHI) SCR approach is shown as type ‘e’ [14, 17, 25, 26].
This overview is based on benchmarking of devices across high-voltage technologies from various foundries and IDMs. Exceptions exist where, e.g., a process is modified to enhance the ESD properties of the Zener diode [5]. Clearly, within the existing device pool there is no generic and no optimal solution. It basically comes down to a selection between a cost-effective design (NPN, SCR) with major latch-up immunity weakness or a guaranteed latch-up-immune design that occupies a huge chip area (Zener diode, PMOS). A single, generic device that solves all the different aspects would greatly simplify IC design in HVCMOS and BCD process technology.

Figure 5: Simplified behavior of the main ESD solution types used for protection of high voltage interfaces: (a) Zener diode, (b) RC MOS, (c) NMOS or NPN device, (d) Basic SCR, (e) HHI-SCR, (f) Novel hebistor clamp
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hm
3/6/2012 4:20 AM EST
@Bart: Very interesting analysis an information for ESD. I have one query. Many ICs have built-in ESD protection for say up to 8kV e.g. RS232 XCVR. However, many designers in general use additional external discrete ESD protection for these devices. Why? Is this required?
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