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Book excerpt: Power Integrity Modeling and Design for Semiconductors and Systems Part 2
Madhavan Swaminathan, Ege Engin
4/10/2012 10:25 AM EDT
From the preface:
Power represents the major bottleneck in modern semiconductors and systems. With transistor scaling over the last two decades, Moore's law has enabled the integration of millions of transistors within an integrated circuit. With lower gate capacitance and lower voltage, faster transistors have become available with each new generation of computers. However, increased transistor integration has resulted in an increase in the current supplied to the integrated circuit, thereby increasing power. Managing the transient current supplied to the integrated circuit at gigahertz frequencies is one of the biggest challenges faced by the semiconductor industry. With lowering of the supply voltage to the transistors, dynamic variation in the power supply due to current transients is becoming a major bottleneck. The dynamic variation of the supply voltage, also called power supply noise, delta I noise, or simultaneous switching noise, is the subject of this book.
Managing power integrity is the process by which the variations on the power supply of the transistors can be maintained within a specified tolerance value. Noise on the power supply can have a direct influence on the speed of an integrated circuit, and hence supplying clean power is a very important element in the design of a computer system. A power distribution network consists of interconnections in the chip, package, and board that include decoupling capacitors, ferrite beads, DC-DC converters, and other components. Both the package and board form a very critical part of the power distribution network, which is the focus of this book.
The book covers two aspects of power distribution: design and modeling, with an emphasis on modeling. The book is organized into five chapters, which cover basic and advanced concepts. All chapters contain several examples to illustrate the concepts, some of which can be reproduced using the software provided. These examples can also be used to evaluate the accuracy and speed of several commercial tools that are available today.
Chapter listings:
Chapter 1: Basic Concepts – the chapter to be previewed
Chapter 2: Modeling of Planes
Chapter 3: Simultaneous Switching Noise
Chapter 4: Time-Domain Simulation Methods
Chapter 5: Applications
Chapter 1 Basic Concepts
Power delivery is a major challenge in present-day systems. This challenge is expected to increase in the next decade as systems become smaller and new materials are introduced into packages and boards. As devices scale and more transistors are integrated into a single integrated circuit, the power and current levels are expected to increase with a corresponding decrease in the voltage. With gigabit signals being propagated through the package and board, the ability to supply clean power to the transistor circuits becomes very critical. In addition, electromagnetic interference levels have to be kept low in the system to manage coupling and crosstalk.
In this chapter, the basics of power delivery are described. Along with a description of the components of a power delivery network (PDN), the analysis methodology of such networks is described with examples.
The book can be purchased here.
In the first excerpt we examined:
1.1 Introduction
1.2 Simple Relationships for Power Delivery
In this excerpt
1.3 Design of PDNs
1.4 Components of a PDN
Yet to come:
1.5 Analysis of PDNs
1.6 Chip-Package Antiresonance: An Example
1.7 High-Frequency Measurements
1.8 Signal Lines referenced to Planes
1.9 PDN Modeling Methodology
1.10 Summary
The book can be purchased here.
Madhavan Swaminathan received his B.E. in electronics and communication from Regional Engineering College, Tiruchirapalli, in 1985, and his M.S. and Ph.D. in electrical engineering from Syracuse University in 1989 and 1991. He is currently the Joseph M. Pettit Professor in Electronics in the School of Electrical and Computer Engineering and deputy director of the Packaging Research Center, Georgia Tech. He is also the cofounder of Jacket Micro Devices, a company specializing in RF modules for wireless applications. Before joining Georgia Tech, he worked on packaging for supercomputers for IBM. Swaminathan has written more than 300 publications, holds 15 patents, and has been honored as an IEEE Fellow for his work on power delivery.
A. Ege Engin received his B.S. and M.S. in electrical engineering from Middle East Technical University, Ankara, Turkey, and from the University of Paderborn, Germany. From 2001 to 2004, he was with the Fraunhofer Institute for Reliability and Microintegration in Berlin. During this time, he also received his Ph.D. from the University of Hannover, Germany. He is currently a research engineer in the School of Electrical and Computer Engineering and an assistant research director of the Packaging Research Center at Georgia Tech. He has more than 50 publications in refereed journals and conferences in the areas of signal and power integrity modeling and simulation.
This posting is part of the EDA Designline power series and is archived and updated. The root is accessible here. Please send me any updates, additions, references, white papers or other materials that should be associated with this posting. Thank you for making this a success - Brian Bailey.
Power represents the major bottleneck in modern semiconductors and systems. With transistor scaling over the last two decades, Moore's law has enabled the integration of millions of transistors within an integrated circuit. With lower gate capacitance and lower voltage, faster transistors have become available with each new generation of computers. However, increased transistor integration has resulted in an increase in the current supplied to the integrated circuit, thereby increasing power. Managing the transient current supplied to the integrated circuit at gigahertz frequencies is one of the biggest challenges faced by the semiconductor industry. With lowering of the supply voltage to the transistors, dynamic variation in the power supply due to current transients is becoming a major bottleneck. The dynamic variation of the supply voltage, also called power supply noise, delta I noise, or simultaneous switching noise, is the subject of this book.
Managing power integrity is the process by which the variations on the power supply of the transistors can be maintained within a specified tolerance value. Noise on the power supply can have a direct influence on the speed of an integrated circuit, and hence supplying clean power is a very important element in the design of a computer system. A power distribution network consists of interconnections in the chip, package, and board that include decoupling capacitors, ferrite beads, DC-DC converters, and other components. Both the package and board form a very critical part of the power distribution network, which is the focus of this book.
The book covers two aspects of power distribution: design and modeling, with an emphasis on modeling. The book is organized into five chapters, which cover basic and advanced concepts. All chapters contain several examples to illustrate the concepts, some of which can be reproduced using the software provided. These examples can also be used to evaluate the accuracy and speed of several commercial tools that are available today.
Chapter listings:Chapter 1: Basic Concepts – the chapter to be previewed
Chapter 2: Modeling of Planes
Chapter 3: Simultaneous Switching Noise
Chapter 4: Time-Domain Simulation Methods
Chapter 5: Applications
Chapter 1 Basic Concepts
Power delivery is a major challenge in present-day systems. This challenge is expected to increase in the next decade as systems become smaller and new materials are introduced into packages and boards. As devices scale and more transistors are integrated into a single integrated circuit, the power and current levels are expected to increase with a corresponding decrease in the voltage. With gigabit signals being propagated through the package and board, the ability to supply clean power to the transistor circuits becomes very critical. In addition, electromagnetic interference levels have to be kept low in the system to manage coupling and crosstalk.
In this chapter, the basics of power delivery are described. Along with a description of the components of a power delivery network (PDN), the analysis methodology of such networks is described with examples.
The book can be purchased here.
In the first excerpt we examined:
1.1 Introduction
1.2 Simple Relationships for Power Delivery
In this excerpt
1.3 Design of PDNs
1.4 Components of a PDN
Yet to come:
1.5 Analysis of PDNs
1.6 Chip-Package Antiresonance: An Example
1.7 High-Frequency Measurements
1.8 Signal Lines referenced to Planes
1.9 PDN Modeling Methodology
1.10 Summary
The book can be purchased here.
Madhavan Swaminathan received his B.E. in electronics and communication from Regional Engineering College, Tiruchirapalli, in 1985, and his M.S. and Ph.D. in electrical engineering from Syracuse University in 1989 and 1991. He is currently the Joseph M. Pettit Professor in Electronics in the School of Electrical and Computer Engineering and deputy director of the Packaging Research Center, Georgia Tech. He is also the cofounder of Jacket Micro Devices, a company specializing in RF modules for wireless applications. Before joining Georgia Tech, he worked on packaging for supercomputers for IBM. Swaminathan has written more than 300 publications, holds 15 patents, and has been honored as an IEEE Fellow for his work on power delivery.
A. Ege Engin received his B.S. and M.S. in electrical engineering from Middle East Technical University, Ankara, Turkey, and from the University of Paderborn, Germany. From 2001 to 2004, he was with the Fraunhofer Institute for Reliability and Microintegration in Berlin. During this time, he also received his Ph.D. from the University of Hannover, Germany. He is currently a research engineer in the School of Electrical and Computer Engineering and an assistant research director of the Packaging Research Center at Georgia Tech. He has more than 50 publications in refereed journals and conferences in the areas of signal and power integrity modeling and simulation.
This posting is part of the EDA Designline power series and is archived and updated. The root is accessible here. Please send me any updates, additions, references, white papers or other materials that should be associated with this posting. Thank you for making this a success - Brian Bailey.
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