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Memory solution addressing power and security problems in embedded designs
10/22/2012 12:29 AM EDT
Security vulnerabilities in embedded designs
Security vulnerabilities in embedded designs
In the simple design shown in Fig. 1, the security vulnerabilities are apparent. The stored content of the external EEPROM/Flash are susceptible to non-invasive as well as invasive attacks. A simple attack would be monitoring the flow of data moving between CPU and external memory either with a physical connection or via a clever software hack as described in the New York Times “From Black Hat: Hackers Demonstrate a Rising Vulnerability of Smartphones.”4
Embedded as well as external floating gate non-volatile memory technologies are also vulnerable to several low-cost non-invasive information attacks including Glitching and Data Remanence, and semi-invasive approaches including UV attacks, Fault Injection, and Voltage Contrast. For an overview of these techniques, see Dr. Sergei Skorobogatov's presentation "Physical Attacks on Tamper Resistance: Progress and Lessons,"5 which details how easy it is to access stored content in floating gate memory.
Embedded non-volatile memory based on blown fuse links (eFuse) or hard-wired memory (ROM) is immune from non-invasive attacks. However these storage mechanisms relinquish their contents easily through semi-invasive methods such as device de-processing and observation of the silicide or metal link break through a focused ion beam (FIB) microscope.
An integrated memory system
For designs that require the lowest power with high security, a better memory system architecture is required. One element of such architecture is integrating external EEPROM/Flash NVM on chip, immediately lowering power consumption, boosting security, and reducing the system bill of materials by one component.
However, integrating external EEPROM/Flash breaks down at 65nm and below, where the floating gate structures used to create EEPROM and Flash becomes a challenge for technical and business reasons. Floating gate technologies may migrate down process geometries, but for today’s development, floating gate is a non-starter in 65nm and below.
Next: The antifuse solution
Security vulnerabilities in embedded designs
In the simple design shown in Fig. 1, the security vulnerabilities are apparent. The stored content of the external EEPROM/Flash are susceptible to non-invasive as well as invasive attacks. A simple attack would be monitoring the flow of data moving between CPU and external memory either with a physical connection or via a clever software hack as described in the New York Times “From Black Hat: Hackers Demonstrate a Rising Vulnerability of Smartphones.”4
Embedded as well as external floating gate non-volatile memory technologies are also vulnerable to several low-cost non-invasive information attacks including Glitching and Data Remanence, and semi-invasive approaches including UV attacks, Fault Injection, and Voltage Contrast. For an overview of these techniques, see Dr. Sergei Skorobogatov's presentation "Physical Attacks on Tamper Resistance: Progress and Lessons,"5 which details how easy it is to access stored content in floating gate memory.
Embedded non-volatile memory based on blown fuse links (eFuse) or hard-wired memory (ROM) is immune from non-invasive attacks. However these storage mechanisms relinquish their contents easily through semi-invasive methods such as device de-processing and observation of the silicide or metal link break through a focused ion beam (FIB) microscope.
An integrated memory system
For designs that require the lowest power with high security, a better memory system architecture is required. One element of such architecture is integrating external EEPROM/Flash NVM on chip, immediately lowering power consumption, boosting security, and reducing the system bill of materials by one component.
However, integrating external EEPROM/Flash breaks down at 65nm and below, where the floating gate structures used to create EEPROM and Flash becomes a challenge for technical and business reasons. Floating gate technologies may migrate down process geometries, but for today’s development, floating gate is a non-starter in 65nm and below.
Fig. 2: A fully integrated memory system
Next: The antifuse solution
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