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Memory solution addressing power and security problems in embedded designs
10/22/2012 12:29 AM EDT
The antifuse solution
NVM technology by its nature consumes no power when memory is not being accessed and all embedded NVM solutions discussed meet the low power mandated by mobile monitoring devices and digital wallet chips. However, of the available embedded NVMs, antifuse technology (Fig. 2) offers the best combination of power, security, and programming flexibility. Table 1 shows some typical characteristics of a mobile SoC.
Power and security advantages of an antifuse OTP are derived from the way data is stored in its fundamental storage bit cell. For example, one of Kilopass’ developed antifuse bit cells consists of two NMOS transistors: one for programming and a second select transistor that is coupled in series. Applying a voltage to the programming transistor produces a breakdown in its gate dielectric. The breakdown creates a connection between the gate and the channel of the transistor. Thus, a high resistance gate dielectric becomes a low resistance silicon link: changing the cell state from a zero “0” to a one “1”. (See Fig. 3.)
Programming the antifuse bit cell induces a randomly localized physical property change in a tiny region of the gate oxide. The bit determines an initial “0” or programmed “1” through the process of a current sensing, making the bit cell less vulnerable to low-cost, non-invasive attacks—glitching and data remanence—as well as semi-invasive attacks such as UV attacks, fault injection, and voltage contrast. Furthermore, there is no deterministic way to locate and view the oxide breakdown, making the memory contents resistant to physical attacks such as de-processing and FIB examination. This is one reason antifuse memory technology is widely deployed for encryption key storage. (See Fig. 4.)
The value of the embedded design resides in the firmware. When incorporated on chip, it becomes resistant to physical hacking attacks. This code has distinct elements: (1) the main control program (locked in non-changeable one-time programmable NVM) for ultimate security; (2) a section of code in FTP (few time programmable) NVM that can be used for secure updates; and (3) for authentication, another secure area of storage hidden from passive or physical attacks.
The typical size of an embedded program is 32kB to 128kB. Applications in this category include Bluetooth, Zigbee, and Wi-Fi peripherals ranging from designs for wireless devices that monitor health and fitness to more sophisticated designs for home automation and security and NFC devices for digital wallet, wireless financial transactions, and electronic identification—driver’s license, passport, fare collection, and others. Battery powered and easily connected to the web, these applications can be remotely accessed, for example, using secure and authenticated Smartphone programs.
Over two years ago, Kilopass pioneered logic antifuse technology and addressed code storage needs with the introduction of Gusto, a high-density embedded antifuse NVM for code storage. With growing adoption for code storage and emerging market trends to address the “Internet of Things,” Kilopass recently released a second-generation code storage product called Gusto-2. It addresses low-power and small form factor requirements, as well as the security needs for tomorrow’s applications from mobile wallet to low-energy Bluetooth devices. Initially, Gusto-2 is available in 65nm/55nm, followed by 40nm.
The power and area will take up a fraction of the SOC described in Table 1. The standby power will be significantly smaller than SRAM. The array area will be comparable to that of a similar capacity SRAM. The performance will delivery 400MB/s throughput. Initial storage capacities of 256kb, 512kb, and 1024kb will be available. And, it supports wide synchronous datapath CPU bus architectures to enable efficient execute-in-place access.
Remote monitoring and electronic financial transactions are applications driving a new generation of SoC designs that will be energy frugal, high performance, and sufficiently small enough to fit into space-constrained consumer devices. Such SoCs demand a memory subsystem to match their stringent power and security needs.
References
About the author:
Andre
Hassan is Field Marketing and Applications Director at Kilopass. He is
an industry veteran with over 20 years of semiconductors and systems
experience. Hassan brings a broad business experience in marketing,
sales and operations, as well as depth in multiple engineering
disciplines. Prior to Kilopass, he held senior management and
engineering positions at Sigmatel, Monolithic System, S3, Sun
Microsystems and Digital Equipment.
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
NVM technology by its nature consumes no power when memory is not being accessed and all embedded NVM solutions discussed meet the low power mandated by mobile monitoring devices and digital wallet chips. However, of the available embedded NVMs, antifuse technology (Fig. 2) offers the best combination of power, security, and programming flexibility. Table 1 shows some typical characteristics of a mobile SoC.
Table 1. Typical design requirements for ultra low-power SoCs
Power and security advantages of an antifuse OTP are derived from the way data is stored in its fundamental storage bit cell. For example, one of Kilopass’ developed antifuse bit cells consists of two NMOS transistors: one for programming and a second select transistor that is coupled in series. Applying a voltage to the programming transistor produces a breakdown in its gate dielectric. The breakdown creates a connection between the gate and the channel of the transistor. Thus, a high resistance gate dielectric becomes a low resistance silicon link: changing the cell state from a zero “0” to a one “1”. (See Fig. 3.)
Fig. 3: An illustration of unprogrammed and programmed antifuse bit cell
Programming the antifuse bit cell induces a randomly localized physical property change in a tiny region of the gate oxide. The bit determines an initial “0” or programmed “1” through the process of a current sensing, making the bit cell less vulnerable to low-cost, non-invasive attacks—glitching and data remanence—as well as semi-invasive attacks such as UV attacks, fault injection, and voltage contrast. Furthermore, there is no deterministic way to locate and view the oxide breakdown, making the memory contents resistant to physical attacks such as de-processing and FIB examination. This is one reason antifuse memory technology is widely deployed for encryption key storage. (See Fig. 4.)
Fig. 4: Cross section, top, and FIB view of antifuse bit cell
The value of the embedded design resides in the firmware. When incorporated on chip, it becomes resistant to physical hacking attacks. This code has distinct elements: (1) the main control program (locked in non-changeable one-time programmable NVM) for ultimate security; (2) a section of code in FTP (few time programmable) NVM that can be used for secure updates; and (3) for authentication, another secure area of storage hidden from passive or physical attacks.
The typical size of an embedded program is 32kB to 128kB. Applications in this category include Bluetooth, Zigbee, and Wi-Fi peripherals ranging from designs for wireless devices that monitor health and fitness to more sophisticated designs for home automation and security and NFC devices for digital wallet, wireless financial transactions, and electronic identification—driver’s license, passport, fare collection, and others. Battery powered and easily connected to the web, these applications can be remotely accessed, for example, using secure and authenticated Smartphone programs.
Over two years ago, Kilopass pioneered logic antifuse technology and addressed code storage needs with the introduction of Gusto, a high-density embedded antifuse NVM for code storage. With growing adoption for code storage and emerging market trends to address the “Internet of Things,” Kilopass recently released a second-generation code storage product called Gusto-2. It addresses low-power and small form factor requirements, as well as the security needs for tomorrow’s applications from mobile wallet to low-energy Bluetooth devices. Initially, Gusto-2 is available in 65nm/55nm, followed by 40nm.
The power and area will take up a fraction of the SOC described in Table 1. The standby power will be significantly smaller than SRAM. The array area will be comparable to that of a similar capacity SRAM. The performance will delivery 400MB/s throughput. Initial storage capacities of 256kb, 512kb, and 1024kb will be available. And, it supports wide synchronous datapath CPU bus architectures to enable efficient execute-in-place access.
Remote monitoring and electronic financial transactions are applications driving a new generation of SoC designs that will be energy frugal, high performance, and sufficiently small enough to fit into space-constrained consumer devices. Such SoCs demand a memory subsystem to match their stringent power and security needs.
References
- The World Market for Remote Monitoring Service – 2012 Edition IMS Research, Wellingborough, England
- World Market for Wearable Technology – A Quantitative Market Assessment – 2012, IMS Research, Wellingborough, England
- Mobile Financial Services—A Technology and Market Analysis, Frost & Sullivan, Mountain View, California
- From Black Hat: Hackers Demonstrate a Rising Vulnerability of Smartphones, New York Times July 26, 2012
- Physical Attacks on Tamper Resistance: Progress and Lessons, Dr Sergei Skorobogatov, University of Cambridge, presentation before 2nd ARO Special Workshop on HW Assurance, Washington DC, 11-12 April 2011, excerpted from Sergei Skorobogatov: Physical Attacks and Tamper Resistance, Chapter 7 in Introduction to Hardware Security and Trust, Eds: Mohammad Tehranipoor and Cliff Wang, Springer, September 2011, ISBN 978-1-4419-8079-3
About the author:
Andre
Hassan is Field Marketing and Applications Director at Kilopass. He is
an industry veteran with over 20 years of semiconductors and systems
experience. Hassan brings a broad business experience in marketing,
sales and operations, as well as depth in multiple engineering
disciplines. Prior to Kilopass, he held senior management and
engineering positions at Sigmatel, Monolithic System, S3, Sun
Microsystems and Digital Equipment.If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
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