How to apply formal methods
methods are used throughout the design flow from architectural
validation, through RTL implementation, to post-silicon debug — and this
applies to power-aware verification, too (see figure 2).
The question is: what is the optimum
for applying formal methods to power-aware verification? The
traditional approach to using formal technology is to license a general
purpose, all-in-one formal verification tool suite and acquire the broad
and deep expertise to use it. However, many teams want to apply formal
to only a subset of the verification challenges, then expand their
formal capabilities later as the challenges expand and diversify .
Figure 2: Formal methods in power-aware verification
“apps” approach to formal verification supports this need . An app
targets an individual formal verification application. It provides all
of the tool functionality and formal methodology necessary to perform
its intended application-specific task, such as architectural validation
and clock domain verification. This approach requires the user to
acquire only the expertise necessary for the particular task at hand.
JasperGold Apps can be applied throughout the power-aware verification
flow, enabling the team to apply formal methods only as needed, and at a
pace that suits the team’s project requirements and expertise.
That’s how you apply formal methods to power-aware verification.
About the author
Loh is vice president of Worldwide Applications Engineering at Jasper
Design Automation. Loh has been with Jasper for nine years. Prior
experience includes verification and emulation engineering for MIPS, and
Verification Manager for Infineon’s successful LAN Business Unit. Loh
is a graduate of California Polytechnic State University (BSEE) and San
Diego State for his MSEE. He holds four U.S. Patents on formal
 P1801 - Standard for Design and Verification of Low Power Integrated Circuits. IEEE.
 Si2 Common Power Format Specification (CPF)
 We need a simpler and faster approach to formal verification by Rajeev Ranjan. EE Times.
 Interoperable Application-Specific Solutions for Formal Verification Throughout the Design Flow. Jasper Design Automation.
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