Design Article
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iniewski
Cudos to Adapteva and Cyclos, this is an important milestone...congrats Andreas! ...
GloFo runs with Adapteva, Cyclos IP
Peter Clarke
2/8/2013 7:30 AM EST
LONDON – Globalfoundries has announced it is bringing a multicore processor from Adapteva and resonant clock distribution technology from Cyclos Semiconductor into its intellectual property offering.
The Cyclos clock technology is being applied to Cortex-A15 processor core at 28-nm and should be able to reduce the power consumption of A15-based system-chips from conventional clock-tree implemtations, Globalfoundries said.
Globalfoundries (Milpitas, Calif.) made the announcements at the Common Platform Technology Forum held this week in Santa Clara, Calif.
Startup Adapteva Inc. (Lexington, Mass.) has worked with Globalfoundries over several generations of its Epiphany multicore floating-point coprocessor. The two companies have maintained overall power consumption at 2 watts while moving from 16 cores at 65nm to 64 cores at 28nm. The Epiphany IV when implemented in the 28nm SLP bulk planar CMOS manufacturing process technology offers 64 cores operating at up to 800-MHz clock frequency and demonstrates 50-GFLOPS per watt performance.
Globalfoundries has said they will offer Adapteva's parallel multicore technology in 28SLP for designers to include in system-chip designs enabling server like performance in mobile devices such as smartphones and tablet computers. The technology is designed for use as low-cost and low-power co-processor for running massively parallel tasks in conjunction with an ARM or x86 CPU, Globalfoundries said.
At the same event the Globalfoundries announced plans to implement Cyclos’ low-power semiconductor intellectual property with ARM Cortex-A15 processors using 28nm process technology.
The Cyclos resonant clock mesh technology employs on-chip inductors arranged to interact with the large capacitance of the clock signal distribution network to form an oscillating "tank circuit." The result is that Cyclos inductors and clock control circuits "recycle" the clock power instead of dissipating it on every clock cycle as conventional clock tree implementations do and can achieve reduction in total IC power consumption of up to 10 percent, Cyclos said.
Cyclos Semiconductor (Berkeley, Calif.) has commercialized over 10 years of research to produce resonant clock mesh design solutions that meet testability, reliability, dynamic frequency scaling, and quality assurance requirements. The technology is being applied by Advanced Micro Devices Inc. to x86 architecture processors.
"Cyclos advanced clock mesh technology has already been used to demonstrate reduced power consumption while maintaining high clock speeds with our HKMG process," said Srinivas Nori, director of SoC innovation at Globalfoundries. "Now the powerful combination of our 28nm HKMG process and Cyclos' RCM technology will be available to a broader customer base, thereby enabling them to push the envelope of PPA efficiency for ARM processor-based SoC designs at the leading edge."
Related links and articles:
www.globalfoundries.com
News articles:
AMD, not ARM, first to use startup's low-power clock IP
EE Times' Silicon 60: Hot startups to watch
How Kickstarter created a community for Adapteva
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iniewski
2/8/2013 5:43 PM EST
Cudos to Adapteva and Cyclos, this is an important milestone...congrats Andreas! good luck in finding people to use your cores
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