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Design Article

# Digital Data Locked Loops – Part 1

## 2/18/2013 8:00 AM EST

Some examples

Example 1. An instantaneous snapshot in time of an operational elastic store memory write and read pointer is illustrated in Figure 11.6. In this figure, we can see that the write pointer is pointing to memory location 489 and the read pointer is pointing to location 241. The fill difference between them should be 248 bits. This means there are 248 unread bits in the two-port memory. Let’s do the modulo 1024 computation and verify these numbers:

We ignore the carry bit and treat the result as an unsigned binary number. The fill difference is 248, as we expected, so the modulo 1024 math did the job.

Figure 11.6   Pointer computation, example 1

Example 2. Let’s work another example. This time we will choose a tougher problem. Since we are doing circular math, let’s see what happens mathematically when the memory address 0 lies between the write and read pointers. An instantaneous snapshot of the elastic store memory in operation is illustrated in Figure 11.7. In this example, the write pointer points to memory location 127, and the read pointer points to memory location 890. The two pointers now are bracketing memory location 0. By inspection, we can see that the fill difference is equal to 261 bits. So let’s do the modulo 1024 math and see if we come up with the same result:

Figure 11.7  Pointer computation, example 2

There is no carry bit to ignore, and our pointer math yields the value of 261, so once again we are happy. The reader is invited to work through several examples until convinced that the modulo 1024 math produces correct results for all possible pointer locations.

11.1.3   Digital Data Locked Error Signal

The anxious reader might say, “Big deal—we have a fill difference. What can we do with it?” Good question! The answer may surprise you.

The DLL is essentially a feedback control loop. Proper operation of a control circuit requires that an error signal be computed and then fed back to the circuit as a second input. The purpose of the error signal is to iteratively drive the control circuit to some desired solution.

In our DLL design, the solution we seek is a synthesized bit clock that mirrors and tracks the frequency of the original tributary bit clock. Guess what? The elastic store fill difference we just discussed is the error signal that we will use for our DLL. The fill difference is a measure of how many unread bits we have in memory. It is also an instantaneous measure of just how close the write pointer and read pointer are to one another. As the two pointers chase one another around, the circular memory the fill difference will vary. It will undulate as one pointer advances and recedes relative to the other. The fill difference measurements taken over time will provide pointer tracking information that monitors this undulation. This tracking information is our error signal.

For example, assume the fill difference is slowly increasing, indicating that the write pointer is moving around the circular memory faster than the read pointer. This is interpreted by the DLL that the synthesized read clock is too slow and that it needs to increase the read clock frequency. If, for example, the fill difference is slowly decreasing, the DLL interprets this to mean that the read pointer frequency is faster than the write pointer frequency and therefore the synthesized read clock frequency needs to be reduced. Pretty simple, isn’t it? Then the next question should be, “How can we convert this error information to a synthesized clock frequency?” The answer is found in the following section.