Tilera launches 9-core network processor

LONDON – Fabless chip company Tilera Corp. (San Jose, Calif.) has announced the availability of the Tile-Gx9, a 64-bit 9-core processor targeted at applications in networking, multimedia, storage and general purpose computing and implemented in 40-nm CMOS.

The chip integrates a memory controller, Ethernet and PCI Express interfaces, and available crypto and compression engines and consumes a maximum of 10 watts.

The TILE-Gx9 is described as being suitable for use in 10Gbps routers, firewall appliances, networked storage platforms, wireless access controllers and applications such as running video conferencing with multi-channel H.264 1080-line progressive scan encode/decode.

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At the beginning of the year Tilera announced the availability of 36- and 16-core 64-bit processors in its Tile-Gx series implemented in 40-nm CMOS.

The 3 by 3 array of three-issue, 64-bit cores is connected through Tilera’s patented iMesh on-chip network that supports an advanced virtual memory system. Each core includes 32-kbytes of L1 I-cache, 32-kbytes of L1 D-cache and 256-kbytes of L2 cache, with 2.3-Mbytes of L3 coherent cache across the device. Processor utilization is maximized using an on-board 72-bit DDR3 memory controller.

Integrated I/O features include up to 12 ports of 1-Gbps Ethernet and 2 ports of 10-Gbps Ethernet, along with multiple PCI Express controllers that can be configured as either root complex or endpoints.

"We are seeing enormous market traction and design win activity with our 16- and 36-core Tile-Gx processors, unseating embedded processors and other difficult-to-program devices," said Devesh Garg, president and CEO at Tilera, in a statement.


Related links and articles:

www.tilera.com

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