Overcoming the challenges of linking A/D converters and microcontrollers via long transmission lines (Part 2 of 2)

Tame the Circuit with Termination
Termination is required when the two-way total propagation delay is greater than or equal to the signal rise time, or 2 × T_PD≥t_RISE. If source impedance is not matched, the signal at the load will be distorted. Therefore, be sure to terminate the cables when cable propagation delay exceeds half of t_RISE. A good termination is when the characteristic impedance matches the source and load impedance.

In a source series-termination scheme (Figure 6), the driver resistor matches the cable's impedance (Z_C) versus matching impedance at load (Z_L). Since the driver output impedance is lower than 100 Ω, add a series resistor to the signal source impedance to match the cable impedance Z_C. Practically speaking, termination only at one end of the transmission line often is adequate and commonly used.

Figure 6: Transmission line model as shown in Figure 1
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If we use the same circuit (Figure 1) and pay attention to termination issues, we can correct most of the clock and data distortion issues at the ADC.

Figure 7 shows the proposed termination solution for our test application example. The oscilloscope capture in Figure 8 shows the microcontroller clock in CH1 and the data return from the ADC in CH4.

Figure 7: By investigating termination issues, this circuit addresses an AC termination comprising a resistor and capacitor in series at the transmission channel receiver side
(Click on image to enlarge)

The technique in Figure 7 uses an ac termination or a 100 Ω resistor in series with a 220 pF capacitor-to-ground. An ac termination has the lowest power drain because current only flows through the termination resistor when the capacitor is charging. The time constant of the ac-termination RC pair is equal to three (or more) times the signal's rise time, or t_RISE. As t_RISE equals 1.6 nsec, 13.75 times t_RISE equals approximately 22 nsec. A series termination of 80 Ω is installed at the transmission-line driver side and ac termination is installed at the receiver side.

Figure 8: Microcontroller oscilloscope screen capture shows improved signal integrity over Figure 3
(Click on image to enlarge)

Thinking Ahead
Even though clock speeds in our test application are below 30 to 40 MHz, this high-performance system required attention to long-transmission-line issues such as reflection and termination. We delved into the issues behind a twisted-pair cable and found that the slower clock speed of 2.25 MHz revealed transmission errors with a simple board-to-board connection.

Additionally, critical factors for achieving a high-performance PCB interconnection system were considered. Moving through the termination discussion, we learned that the highest-frequency signal was determined by the signal's switching times. We addressed these issues using a twisted-pair cable. By analyzing the transmission line model, we found that a propagation delay time greater than 15 percent of the signal's rise time dictated which termination technique to use.

(A special "thank you" goes to Tom Hendrick at Texas Instruments for his guidance and contribution in defining this topic and setting up our test.)

Reference:
1. "High Speed Digital Design: A Handbook of Black Magic," Howard Johnson, Prentice Hall, 1993
2. "Managing Signal Quality," Mentor Graphics/Xilinx, 2005 www.xilinx.com/publications/xcellonline/xcell_53/xc_pdf/xc_mentor53.pdf

About the Authors
John Zhonghua Wu is a senior application engineer at Texas Instruments. He holds a Bachelor of Engineering degree in Electronic Engineering from University of Dalian, P.R. China, and a Master of Science degree in Electronic Engineering from the Chinese Academy of Sciences.

Bonnie Baker is a senior application engineer at Texas Instruments. She holds a Masters of Engineering degree in Electrical Engineering from the University of Arizona, and is the author of many articles and columns.