As service providers strive to meet growing government demands for "green" compliance, as well as their own financial desire to reduce operating expenses, the problem of heat dissipation has developed into a hot-button issue amongst the semiconductor industry in addressing these concerns. Heat dissipation, which must be approached from both the component and system architecture standpoint, is a recurring issue that both OEMs and silicon vendors have attempted to find solutions for throughout the years. While silicon vendors are constantly looking at new technologies designed to reduce power (and thus heat) OEMs are constantly evaluating new air-flow approaches and various component cooling approaches.

Regardless of the solutions, anyone who has spent time around a central office has their own story of the "hot component" ranging from a simple capacitor to power-hungry CPUs. In most infrastructure "big iron," there are one or more offending components. Whatever the offending component or influencing factor -- be it the final design which includes noise levels in the central office; the cost of the cooling design; or the amount of air conditioning -- there are some basic options which are available to the semiconductor industry as a whole to manage heat dissipation.

Managing heat dissipation

The energy conscious semiconductor industry is considering many alternate process nodes in order to lower power including developing specific lower power process nodes. In the past, a common approach to reducing chip-level power was the move to smaller and smaller process nodes. A silicon process node is the stepping stone used to represent the size of each technology level. It is represented by the size of the smallest transistor element and is measured in nanometers (nm) or billionths of a meter. Integrated circuit manufactures need to make transistors smaller and smaller so that the chips run faster, and to get more transistors on each chip to increase functionality. Historically, moving to a smaller process node often cut power consumption in half while doubling performance.

However, once the semiconductor industry moved to the 90nm process node, this progression slowed. The primary reason was the concept known as "leakage". Leakage occurs when a current leaks through transistors into the surrounding chip as a path to ground. This power is wasted and thus reduces the expected performance gains of smaller process nodes. Smaller process nodes have higher leakage because the insulating elements of the transistors are thinner and less effective. As a result, majority of the heat generated is from this "leakage" of power.

In order to reduce this "leakage," the alternate process nodes that are being developed by the industry must also take into account the following: package characteristics, direct coupling techniques, and dumping more power to the PCB (versus through the package top) are areas that can be considered.

Heat dissipation solutions

The environment in which new silicon devices are deployed also has a major impact on heat dissipation. Many creative solutions have been applied to the design of the chassis level and blade-level systems. At the chassis level, this environment is primarily characterized by air flow. Power dissipation of the blades leads to a required air flow for cooling at the chassis level. There is a balancing act in the design of these systems related to chassis size, direction of airflow, noise, cooling, and technology footprints i.e. fan size, etc. The VERSAmodule Eurocard bus, or VMEbus, is another prime example of blades that interface to custom or standardized backplanes. Many of today's Advanced Telecom Computing Architecture, or ATCA, form factor solutions interface to custom or standardized backplanes through communications infrastructure blades. Designs using these newer form factors must take the added heat dissipation into consideration.

Heat sinks can be an effective, passive approach to the problem but more attention is still required. Blade-level heat sinks are evolving along with other thermal dissipation options and many new innovative designs are on the market. Many questions develop when configuring components for each particular board:

Effective management of heat must be addressed during product definition and design.

Industry efforts - Interoperability Compliance Document (ICD)

The Communications Platforms Trade Association (CP-TA) recently produced an Interoperability Compliance Document (ICD) that includes a number of ATCA thermal profiles; the profiles gain a consistent measurement of fundamental system power parameters, allowing equipment manufacturers to perform "apples to apples" comparisons. It establishes multiple thermal classification bins to grade a system on its performance in approved lab tests and is used to guide the system thermal operating parameters. Essentially, it simplifies the verbose ETSI, NEBS, and NEDS specs that are ordinarily stated.

There are several profiles defined in the ICD. Texas Instruments has performed multiple variations of these tests to determine where heating issues may be encountered. The following three examples describe profiles which illustrate heat dissipation effects in designs for next-generation central office equipments. These examples will concentrate on normal central office expected operating condition. For the purpose of simplifying this initial study no failure conditions i.e. fan failure or altitude adjustments are considered.

Profile assumptions

Board Area Assumptions

A 280 x 170 mm component placement area is assumed. This is considered a realistic area when factoring other supporting components on a fully functional ATCA blade i.e. power converters, Ethernet switch complex, etc.

Component Assumptions

It was assumed that the component has a maximum case temperature of 100 °C, maximum junction temperature of 105 °C, and is in a 24mm x 24mm package. In addition, it was assumed that this component operates at 4 - Watts maximum with 32 devices on a blade. In a "real" design many other component parameters would be relevant.

Air Flow and Temperature Assumptions

At the blade level, the airflow is typically from bottom to top, with air movers in both the bottom and top fan trays to boost airflow and to provide some fan redundancy. Therefore, the warmest part of the blade is towards the top edge. As this air rises, it traverses the components on the blade. The max nominal central office operating temperature is 40 °C, and this is the temperature used as the Inlet Temperature (Ti) in the examples. The standards dictate a maximum temperature rise of 15 °C across the blade (ΔT) which dictates that the output temperature (To) is 55 °C. To is measured at several points at the top of the blade and averaged. A uniform air flow rate across the blade of 30 cubic feet per minute (CFM) is used for the test scenarios.

Three profiles

The first profile is one in which components are placed in rows and columns on the blade, without the use of a heat sink. In the second profile, a group heat sink was used. Finally, an approach that provides a viable solution where all components are maintained within the prescribed junction temperature was investigated. These are hypothetical profiles but are based upon actual findings.

No heat sink

This profile provides a benchmark for comparison purposes only. It is not expected to yield a workable solution but to illustrate problems in managing heat. Thirty two (32) components are placed within the component envelope area described above. Component placement is provided in the figure below and the analysis results in Table 1. The results in Table 1 document the junction temperature (Tj) for each of the components. Table 2 provides an air temperature measurement at the air outlets of the chassis. Components are identified by column and row.

Component placement. Click on image to enlarge.

Table 1 - Junction Temperature (no heat sink) Click on image to enlarge.

Table 2 -- Outlet Air Temperature (no heat sink) Click on image to enlarge.

The results should be analyzed with respect to each given component. If one assumes that the specified operating temperature for the components is 105 °C junction temperature, then only two of the components would be in that range (A8 and D8). The maximum recorded junction temperature is more than 150 °C which is significantly out of range. Counter intuitively, it would be expected that the first row or two of devices would be within acceptable operating specification, but because of the heat transfer into the PCB and the radiation effects of the PCB, even the best positioned devices are impaired according to the analysis.

The outlet air temperature is approx 48 °C, showing an increase of 8 °C over the 40 °C input temperature. This equates to about half of the allowable temperature rise across the blade.

Group Heat Sink

The first look at potential solutions will be to analyze the group heat sink approach. The same 32 components were used for this scenario. Component placement is identical to the first case (see the first figure). The group heat sink model was used as a baseline for heat sink models. The characteristics of the group heat sink are as follows:

Table 3 provides the junction temperatures recorded as a result of this approach. With the 105 °C junction temperature, all the components would "pass". If on the other hand one tightened the required junction temperature to 90 °C, only some of the devices would "pass".

Table 3 - Junction Temperature (group heat sink) Click on image to enlarge.

The default group heat sink as described previously covers all 32 devices on the blade. This has the effect of more evenly dispersing heat generated by the devices. The fins on the heat spreader act as a more effective means of dispersing device heat into the force fed airflow. In the benchmark case, only two of the devices were operating within the hypothetical thermal tolerance. Applying the group heat spreader allows a all of the devices to operate with the thermal specification. However, we can still do better.

A greener, more efficient solution

A greener, more efficient solution

Multiple solutions exist that meet the component junction temperature requirements. One of those solutions is to use non-uniform spacing for component layout with specific heat sink characteristics.

Group Heat Sink Characteristics

The result of this profile is shown in the figure below

Potential Solution. Click on image to enlarge.

The main improvements in this final profile come from increasing the heat spreader height and variable spacing of the components. The heat spreader material also improves the situation but this has the least significant impact; however, it is still worth noting that it does bring something to the party.

The heat dissipation profile provided in the previous figure was produced using the FLOTHERM software from FLOMERICS. FLOTHERM is a powerful 3D computational fluid dynamics software that predicts airflow and heat transfer in and around electronic equipment, including the coupled effects of conduction, convection and radiation.

Summary

Based on the preceding three profiles, there are many directions to consider. The variables available for OEMs designing end equipment include experimentation with component placement, heat sink material and design, air flow designs, and blade solution density or capacity. The variables available to silicon manufactures are process node, component size, package type, voltage regulation solutions (TI's SmartReflex is an example of this approach), and controlling power consumption. TI has analyzed multiple profiles using the methods described in this paper.

Component level thermal characteristics need to be analyzed in the context of the blade, chassis, and system level product. System level solutions need to be analyzed in the context of chassis, blade, and component power and heat characteristics. TI continues to research component, blade, chassis, and system level issues to ensure that appropriate carrier grade solutions can continue to evolve and satisfy next generation network requirements. These efforts will keep the momentum towards a greener central office on track.

Click on image to enlarge.

John Warner is a Product marketing manager for Texas Instruments, Dave Halliday is a CIV systems architect for Texas Instruments and Jay Reimer is a Systems engineer for Texas Instruments.