NanoEMS - Page 2.
NanoEMS: a brief overview of the technology
technology uses existing metal layers in a CMOS wafer to form the MEMS structure using standard mask techniques. The Inter Metal Dielectric (IMD) is then etched away through the pad openings in the passivation layer using vHF (vapour HF), releasing the metal MEMS structures.
The low-cost isotropic etching uses equipment that is already available for volume production and takes less than an hour, which is insignificant compared to the overall production time: contrast this with the highly anisotropic DRIE process used by other MEMS manufacturers to create cavities and define structures in CMOS, requiring more elaborate equipment and costly process steps. The holes are then hermetically sealed using a standard thin-film deposition applied to the whole wafer in a single step. Finally the chips are singulated and packaged as required.
Since only standard, high volume CMOS processes are used, NanoEMS
structures may be monolithically integrated with other nanoEMS sensors and active circuitry as required enabling smart sensors to be created. The MEMS and electronics are formed simultaneously using a single, standard mask set.
Illustration of NanoEMS technology
NanoEMS creates a generic CMOS motion sensor cell
NanoEMS resolves the previously mentioned complexities by creating generic motion sensor cells
that may be adapted to create all of the motion sensor types.
This not only provides the key to sensor integration
but also enables exciting new concepts, such as smart reconfigurable
In motion sensing, MEMS devices measure mechanical deflections caused by applied forces
The forces to be measured are those that are applied to the sensor by:
- Linear acceleration, a (Newton: Force = mass x a)
- Angular velocity, Ω (Coriolis: Force = 2 x mass x velocity x Ω)
- Earth’s magnetic field, BE (Lorentz Force = BE x conductor length x conductor current)
- Pressure, P (Force = P x Area)
The released mechanical structures and the associated capacitive sensing structures that form a NanoEMS motion sensor cell are designed in principle to detect and measure the presence of an applied force. The mechanical and electrical design criteria determine the range (expected maximum strength of the force) and resolution of the measurement of the force, given appropriate constraints:
- the bandwidth (BW) required of the measurement system (how fast the force is changing)
- the Signal to Noise Ratio (SNR) required to provide the appropriate range and resolution
- the sensor current (I) required for the measurement
In principle, each of the quantities of interest (a, Ω, BE, P) translate to a force applied to the sensor device, and each can therefore be measured using the same generic MEMS structure. The specific design constraints for the sensing structures are adjusted according to the characteristics of the force applied by the quantity of interest (a, Ω, BE, P).
The generic motion sensor cell concept not only cracks the integration roadblock of different processes for implementing the four different sensor types, but also allows all three axes of the accelerometer, gyroscope and compass to be deployed in a single plane, i.e. the plane of the chip. Indeed, the generic nature of the motion cell design ensures a rapid time to market for different sensor variants.
Using the NanoEMS generic sensor cell concept, each of the key issues limiting the cost-effectiveness of co-packaging all the motion sensors is systematically resolved. Monolithic, integrated NanoIMUs become an exciting and realistic prospect, bringing the complete set of motion sensors together on the same chip and in a package size similar to today’s discrete motion sensors.
Low-cost manufacturing: NanoEMS enables all motion sensors and even other MEMS devices to be manufactured in standard CMOS. Manufacturing test time is reduced.
Reduced process complexity: All of the four sensor types can be manufactured in the same CMOS process with no special materials. By using the Lorentz force compass technique, no additional magneto-resistive material deposition or magneto-concentrator device is required, further reducing manufacturing cost and increasing cross-axis performance by virtue of the sensor alignment being defined by the very tight x-y alignment accuracy of conductors on a CMOS wafer.
Low-cost packaging: Since the sensors are created and sealed inside standard CMOS chips, they can be packaged in either standard, plastic molded packaging, or, because the device is monolithic, a flip-ship style CSP (chip-scale package) for minimal PCB area.
Low-complexity packaging - even where a vacuum is required: The NanoEMS cavity inside the CMOS chip is sealed in a vacuum, sufficient to accommodate resonant devices requiring internal vacuum to provide the desired Q factor of resonance. This elegant solution precludes the need for specialist packaging and getters to form and maintain the vacuum: with the evacuated cavity sealed inside the silicon, the chip can once again be encapsulated in standard plastic molded packaging or flip-chipped.