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anonymous user
As configured, the circuit is a clamp and will never have any effect on either ...
anonymous user
R1 is not necessarily part of an RC. The first capacitor is simply a DC block. ...
Hardware watchdog timer accepts range of frequencies
Robert Most, Ferris State University, Big Rapids, MI; Edited by Martin Rowe and Fran Granville
8/12/2010 1:00 PM EDT
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Microcontrollers usually require a watchdog timer to bring high currents or high voltages into a safe condition. Many microcontrollers have built-in watchdog timers for this purpose. You may, however, prefer that an external circuit be the judge. An external watchdog circuit checks the integrity of the microcontroller’s code, bringing the outputs to a safe state when it judges that the microcontroller’s firmware has gone awry. Conditions such as errant code or failed hardware can cause these issues.
You have many options for designing an interface between your external timer and the microcontroller. For example, you can use a port pin, which yields a flexible and adaptable way to couple with almost any microcontroller.
In applications that require energizing an output or series of outputs, you need an enable signal. You can use this enable signal to energize a relay providing power to an output device. Turning the enable signal into a watchdog signal is therefore a wash in terms of port-pin usage. The implementation of this watchdog circuit requires the output port pin to toggle, rather than stay at a constant state.
Most microcontroller code has a main loop that is always either performing a task or calling larger functions and interacting with interrupt-service routines. If an errant task, unforeseen bug, or unintentional vector executes, the main loop either gracefully reinitializes or becomes stuck indefinitely. Either situation breaks the execution of the main loop. When that situation occurs, the timer needs to remove power from your circuits.
You can implement the watchdog
timer by toggling a port output whenever
the main loop runs, provided that
the main loop executes 10 to 100,000
times/sec. Figure 1 demonstrates this
concept. You can implement this
watchdog philosophy in several ways.You must allow for variability in the
rate of the toggle signal because extraneous
interrupts and other nondeterministic
events may cause variability in
the main loop’s execution loop time. If
the watchdog circuit is not sufficiently
forgiving, it may lead to false triggers,
defeating its purpose. The recovery time
of the watchdog timer is the maximum
time between toggling events in duration.
This scenario can happen when
the system is in a recovery, or “limphome,”
mode. This circuit can accommodate
the recovery duration, but, if it
deems necessary, the recovery operation
can disable the watchdog timer’s output. Listing 1 is a document
containing sample code.
Changing the value of capacitor C2 changes the range of compliance frequencies that the main loop generates. The circuit also functions with a 3.3V processor, but either the relay must have its own 5V supply or you must use a lower- voltage relay.
The circuit in Figure 2 uses two bipolar
transistors. The second transistor is
simply a relay driver. The circuit works
by removing the dc component from
the incoming toggling square wave,
rectifying and creating an average dc
value. This wave feeds transistor Q1, biased
such that a prolonged absence of
pulses turns it off, thus turning off Q2
and the relay. Changing the value of C2
also changes how quickly the watchdog
timer reacts to an absence of pulses. The
circuit accepts toggling frequencies of
10 Hz to 100 kHz.
Changing the value of capacitor C2 changes the range of compliance frequencies that the main loop generates. The circuit also functions with a 3.3V processor, but either the relay must have its own 5V supply or you must use a lower- voltage relay.
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JeremyW
8/13/2010 3:01 PM EDT
I think there was a transcription error in the schematic. As drawn, the diode in series with the 22 uF capacitor will not allow this circuit to work. The capacitor will charge such that it has 5 V across it at all times, and the 0-5 V square wave on the input will become a 5-10V square wave on the cathode of the diode, which will not conduct (other than to overcome leakage and keep the capacitor charged). I believe the reverse leakage current of the diode is on the order of a few microamps, not enough to cause sufficient conduction to turn on Q1 and Q2.
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WKetel
8/13/2010 5:43 PM EDT
Each falling edge of the input signal will tend to transfer some charge to C2, making the base of Q1 less positive than the emitter. Then the transister conducts , and the circuit functions as described. The charge transferred is not a large amount, and it is likely that using a low leakage high quality capacitor for C1 may not function as well.
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Hernando.Garcia
8/14/2010 12:22 AM EDT
D1 in series with the C1,22 Uf input capacitor will not allow the proper operation to charge the capacitor C2.
The circuit feeding current to the 2N3906 Base is wrong, including the placement of C2 which will have an effective Delta voltage of around 40 mv .
The capacitor C2 should be placed with a resistor between itself and the base of the 2N3906 transistor, like 4.7 K ohms.
Place R3, 220 K ohms resistor in parallel to C2.
The C1, 22 UF capacitor in series with R1, 1 K ohms and the other side of R1 connected to the capacitor C2, then place the diode D1, 1N4401 with the cathode to the supply and the anode to the junction of C1 and R1
This way the capacitor is recharged every positive going pulse via D1 and energy transfer to C2 when pulse goes negative.
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anonymous user
8/15/2010 8:57 AM EDT
The diode is reversed because this is a PNP bjt. I prototyped this circuit and it works perfectly. Thanks for the circuit, I am going to use it (perhaps with a little more current drive) for a photovoltaic DC/DC converter circuit.
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anonymous user
8/15/2010 4:32 PM EDT
Diode D1 is round the right way, but R1 is connected at the wrong end of it, as Jeremy Willden commented.
The way the circuit should work, R1 and C1 form an R-C differentiator. The right end of C1 is held at an average voltage of 5V by R1 (which should be connected to the junction between C1 and D1), and every falling edge on the input will cause D1 cathode to jump from roughly 7.5V to roughly 2.5V (assuming 5V input swing and 50% duty cycle), which will cause current to flow through D1 and R2 to "charge" C2 so its negative end goes far enough below the 5V rail to bias Q1 into conduction.
With the mistake as printed, the circuit shouldn't work, even by accident.
BTW the web comment form rejects my email address (k@heidenstrom.gen.nz). It accepted kris@heidenstrom.gen.nz.
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anonymous user
8/15/2010 5:48 PM EDT
R1 is not necessarily part of an RC. The first capacitor is simply a DC block. That's the way I interpret it. A prototype would be a better approach than speculation or heaven forbid - a simulation!!!
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anonymous user
8/22/2010 12:01 AM EDT
As configured, the circuit is a clamp and will never have any effect on either transistor. Add a diode right at the input after C1 to prevent excursions above Vcc. This circuit can be simulated in Spice with about 2 minutes of effort.
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