Design Article
Split-gate thin-film storage provides NOR flash alternative
Kelly Baker and Kaivan Karimi, Freescale Semiconductor Inc.
10/5/2012 11:38 AM EDT
What is SG-TFS?
Further confining our scope to the use of embedded NOR flash onboard many of today’s microcontrollers, smartcards and digital signal processors, the most common bit cell types are the one-transistor floating-gate (1T-FG) cell and the 1.5-T, or split-gate cell. 1T-FG cells are similar to those used in most discrete NOR flash products, and they play a very important role in embedded NVM applications, because they typically provide the smallest cell size, and are proven for rigorous automotive applications. However, 1T-FG cells require a relatively large chip area to contain the overhead needed for each sector, and they often require fairly large currents to program.
In contrast, split-gate cells often involve larger bit cell sizes, but they can be programmed with about 10% of the current used for typical 1T-FG cells, and the overhead associated with each sector is reduced. This has made split-gate cells a popular choice for embedded flash, particularly where the total byte count is lower and where it is desired to have many small erasable sectors, rather than a few large sectors. Because the read operation of a split gate cell usually involves lower-voltage transistors, it can also be accessed with faster read access times and significantly lower power consumption.
Split-gate technology offers a number of benefits:
Split-gate TFS (SG-TFS) combines all the advantages of split-gate (SG) and nanocrystal-based TFS technologies. It is a type of split-gate cell that combines all of the inherent split-gate advantages with another major innovation: the use of an array of small (less than 100-Å diameter) silicon islands to store the data in the cell (see figure 4). Because the data storage depends on a large number of these nanocrystals working together to store charge, the SG-TFS cell will retain its overall data state even if one of the individual nanocrystals were to fail. This unique feature provides good retention of the stored data, even if a small defect were to occur during manufacturing.
Another unique advantage of SG-TFS is that the individual nanocrystals are less influenced by electric fields that may originate along the edges of the bit cell. This means the edges can be brought closer together, and the electrical behavior of the array of nanocrystals is not strongly affected. In other words, the active part of the bit cell can be scaled more easily.
To summarize, the advantages of thin-film storage based nanocrystals are:
Further confining our scope to the use of embedded NOR flash onboard many of today’s microcontrollers, smartcards and digital signal processors, the most common bit cell types are the one-transistor floating-gate (1T-FG) cell and the 1.5-T, or split-gate cell. 1T-FG cells are similar to those used in most discrete NOR flash products, and they play a very important role in embedded NVM applications, because they typically provide the smallest cell size, and are proven for rigorous automotive applications. However, 1T-FG cells require a relatively large chip area to contain the overhead needed for each sector, and they often require fairly large currents to program.
In contrast, split-gate cells often involve larger bit cell sizes, but they can be programmed with about 10% of the current used for typical 1T-FG cells, and the overhead associated with each sector is reduced. This has made split-gate cells a popular choice for embedded flash, particularly where the total byte count is lower and where it is desired to have many small erasable sectors, rather than a few large sectors. Because the read operation of a split gate cell usually involves lower-voltage transistors, it can also be accessed with faster read access times and significantly lower power consumption.
Figure 3: Cross-section of a split-gate flash bit cell. This is Freescale’s split-gate TFS (SG-TFS) cell, which places a select gate in series with a nanocrystal-based storage device.
Split-gate technology offers a number of benefits:
- Simple operation: Placing a select gate in series with the charge-storage device allows sector erase without complex algorithms to control leakage.
- Efficient arrays: Most decode circuitry uses compact low-voltage devices for low overhead. Sector overhead is built into array, allowing many small sectors (1 KB for example) without extra area.
- Fast read access: The data path for read operations uses only fast, low-voltage transistors.
- Low-power read/write: Low-voltage data path has a small voltage swing and reduced dynamic power consumption. Programming current required per bit is roughly 10% of that required by conventional 1T flash, which allows it to use smaller, more efficient charge pumps.
Split-gate TFS (SG-TFS) combines all the advantages of split-gate (SG) and nanocrystal-based TFS technologies. It is a type of split-gate cell that combines all of the inherent split-gate advantages with another major innovation: the use of an array of small (less than 100-Å diameter) silicon islands to store the data in the cell (see figure 4). Because the data storage depends on a large number of these nanocrystals working together to store charge, the SG-TFS cell will retain its overall data state even if one of the individual nanocrystals were to fail. This unique feature provides good retention of the stored data, even if a small defect were to occur during manufacturing.
Figure 4: SG-TFS is a type of split-gate cell that stores data in an array of small (less than 100-Å diameter) silicon islands.
Another unique advantage of SG-TFS is that the individual nanocrystals are less influenced by electric fields that may originate along the edges of the bit cell. This means the edges can be brought closer together, and the electrical behavior of the array of nanocrystals is not strongly affected. In other words, the active part of the bit cell can be scaled more easily.
To summarize, the advantages of thin-film storage based nanocrystals are:
- Reliability: Charge is stored in a thin film of nanocrystals, so data is maintained even if one crystal loses charge.
- Low cost: Cell structure is simple to integrate into CMOS, and doesn’t require triple poly layers, complicated polishes, multiple spacer formations, etc.
- Scalability: Cell operation doesn’t depend on coupling ratios, and basic operation is maintained even as feature sizes are reduced with each generation of lithography.
- Application diversity: Able to meet a broad range of market applications
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