Design Article
Alternative NVM technologies require new test approaches, Part 1
Peter Hulbert, Keithley Instruments Inc.
11/13/2012 9:00 AM EST
Testing PCM
Traditionally, PCM test devices are measured with a custom setup consisting of a pulse generator, load resistor, and an oscilloscope, with software developed in-house for overall control and data extraction. This approach is straightforward but requires an active probe or floating scope when the load (or sense) resistor is on the high side of the test device. Measuring the voltage drop across this resistor allows for easy calculation of the current flowing, which is why it’s also called the sense resistor. Unfortunately, this I*R voltage drop also complicates the analysis of the results. This I*R drop can be minimized by using a smaller value sense resistor, but this has the drawback of directly reducing the current measure sensitivity, so some compromise must be made. Sometimes, multiple sense resistors are supported, but this also increases the complexity of the system configuration and control software. New testing technology allows users to simultaneously apply pulses to a memory device or material and measure current and voltage with a single instrument.
Modern pulse I-V instrumentation measures the current with a feedback ammeter and a high speed analog-to-digital converter (ADC) to increase sensitivity, while the system provides for high level control, data extraction, and presentation (see figure 2). Multi-pulse waveform generation capability in these systems can be used to characterize the switching mechanism of a memory device in both the transient and I-V domains, using DC-like extractions from the tops of pulses or plotting the measurements taken during pulse transitions. The multi-pulse capability allows for control over each segment of the waveform, delivering precise control of each transition for a single pulse or for hundreds of pulses in a single waveform. Ideal systems further allow users to easily increase the number of channels of synchronized pulse I-V capability. As a result, as the material development using two-terminal test structures transitions into multi-terminal structures, it’s possible to scale the test system to allow for a pulse-per-pin test approach or test multiple devices simultaneously to gather the quantities of data necessary for statistical analysis as a part of modern product and process development.
Some PCM structures have what is called a select diode or a protection diode integrated in series with the PCM cell. In addition to introducing some issues for the I-V curve, this diode makes the effective fall time shorter. The current flowing through a diode is exponentially dependent on the voltage, so a small decrease in the voltage results in a dramatic reduction in the current flowing through the diode, especially at currents less than 50 µA. Therefore, when testing devices with the series selection diode, the pulse fall time is not as critical for small current test devices and permits testing with standard pulse I-V instrumentation.
Much like other types of NVM technologies, a PCM cell must be formed before it displays the consistent switching necessary to be a memory element. One way to explain the forming process is that it creates the active area of the PCM cell. The active area is the portion of the chalcogenide material that transitions between the amorphous and crystalline states (see figure 3). The goal of the forming process is reproducible cycling between the SET and RESET states.
Traditionally, PCM test devices are measured with a custom setup consisting of a pulse generator, load resistor, and an oscilloscope, with software developed in-house for overall control and data extraction. This approach is straightforward but requires an active probe or floating scope when the load (or sense) resistor is on the high side of the test device. Measuring the voltage drop across this resistor allows for easy calculation of the current flowing, which is why it’s also called the sense resistor. Unfortunately, this I*R voltage drop also complicates the analysis of the results. This I*R drop can be minimized by using a smaller value sense resistor, but this has the drawback of directly reducing the current measure sensitivity, so some compromise must be made. Sometimes, multiple sense resistors are supported, but this also increases the complexity of the system configuration and control software. New testing technology allows users to simultaneously apply pulses to a memory device or material and measure current and voltage with a single instrument.
Modern pulse I-V instrumentation measures the current with a feedback ammeter and a high speed analog-to-digital converter (ADC) to increase sensitivity, while the system provides for high level control, data extraction, and presentation (see figure 2). Multi-pulse waveform generation capability in these systems can be used to characterize the switching mechanism of a memory device in both the transient and I-V domains, using DC-like extractions from the tops of pulses or plotting the measurements taken during pulse transitions. The multi-pulse capability allows for control over each segment of the waveform, delivering precise control of each transition for a single pulse or for hundreds of pulses in a single waveform. Ideal systems further allow users to easily increase the number of channels of synchronized pulse I-V capability. As a result, as the material development using two-terminal test structures transitions into multi-terminal structures, it’s possible to scale the test system to allow for a pulse-per-pin test approach or test multiple devices simultaneously to gather the quantities of data necessary for statistical analysis as a part of modern product and process development.
Figure 2: Model 4225-PMU Ultra-Fast I-V Module and two Model 4225-RPM Remote Amplifier/Switch Module permit the integrated simultaneous measurement of current and voltage on each channel.
Some PCM structures have what is called a select diode or a protection diode integrated in series with the PCM cell. In addition to introducing some issues for the I-V curve, this diode makes the effective fall time shorter. The current flowing through a diode is exponentially dependent on the voltage, so a small decrease in the voltage results in a dramatic reduction in the current flowing through the diode, especially at currents less than 50 µA. Therefore, when testing devices with the series selection diode, the pulse fall time is not as critical for small current test devices and permits testing with standard pulse I-V instrumentation.
Much like other types of NVM technologies, a PCM cell must be formed before it displays the consistent switching necessary to be a memory element. One way to explain the forming process is that it creates the active area of the PCM cell. The active area is the portion of the chalcogenide material that transitions between the amorphous and crystalline states (see figure 3). The goal of the forming process is reproducible cycling between the SET and RESET states.
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R G.Neale
11/15/2012 4:29 AM EST
Peter did you mean this ""Much like other types of NVM technologies, a PCM cell must be formed before it displays the consistent switching necessary to be a memory element.""
While PCM has a number of problems, the need to “form” the device should no longer be necessary. Imagine the problems, cost and time, of forming each bit of an 8G-bit array. Unless the author knows something that we are not being told forming effects should have gone away with the use of the crystallized active material as one electrode in the PCM structure.
In the distant past, when PCM devices were fabricated with the active material in the amorphous state then there is a first switching (or forming) pulse. This is because the state of disorder, which determines the threshold voltage, of the as deposited film, differs from that of the same material after the first set/reset cycle, also there may have been some element separation that may have an impact on the value of the threshold voltage. While it is still necessary to empirically establish the optimum operating parameters by an iterative process for each new PCM device structure I think the author may have inadvertently confused that process with a need for forming. Once the optimum operating conditions are established with crystallized active electrodes there should be no need for forming.
One other question have the annotations for Current and Voltage been accidentally transposed in Figure 7 or is this a power PCM device??
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Kristin Lewotsky
11/16/2012 6:13 PM EST
Good catch, Ron -- the axes labels on Figure 7 were indeed transposed; look for a corrected version to appear shortly.
Kristin
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resistion
11/16/2012 7:23 PM EST
When you have a resistance-based memory like PCM or STT MRAM and it needs to scale to lower currents, there don't seem to be any chip array testers (not individual cell probes) that can go down to nano amps for read currents. Hope this situation will change.
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