Design Article
Alternative NVM technologies require new test approaches, Part 1
Peter Hulbert, Keithley Instruments Inc.
11/13/2012 9:00 AM EST
Understanding the R-I curve
Long-term cycling, or endurance, is a key attribute for any memory candidate. One of the challenges associated with testing a new or unknown cell is to determine the appropriate pulse parameters (amplitude, rise/fall, width) for the RESET and SET pulses. This is usually an iterative process, first starting with a reasonable RESET pulse, then optimizing the SET pulse. Just as with flash memory, it is possible to over-stress the cell and permanently damage it. Because the RESET voltage is the largest, the search for the appropriate RESET voltage must be done with care.
The R-I curve is a typical phase-change NVM device measurement. The SET pulse voltage is increased while the RESET and SET resistance values are being measured. Figure 4 shows a four-pulse waveform for one point in the R-I curve, which was generated and measured with a single instrument. Note that the entire four-pulse test waveform, which is one step in a SET sweep, requires only tens of microseconds. Some test systems may use SMUs for the resistance measurements, but this requires additional switching and much longer test times. The newest pulse I-V instrumentation available measures the voltage and current simultaneously at multiple points in the test, providing flexibility while ensuring that the proper measurements are made. Here, spot means are taken (green boxes in Figure 4) to capture the measurements needed to produce the resulting R-I curve.
The SET current of the R-I curve usually has the characteristic U shape usually known as a “bathtub” curve (see blue curve in figure 5). Note that the RESET resistance is traditionally displayed with the SET resistance, even though the RESET pulse is not changing throughout the sweep, causing the RESET R to be a straight line. Plotting the RESET R does indicate if the RESET pulse is adequately resetting the material after each SET pulse.
Long-term cycling, or endurance, is a key attribute for any memory candidate. One of the challenges associated with testing a new or unknown cell is to determine the appropriate pulse parameters (amplitude, rise/fall, width) for the RESET and SET pulses. This is usually an iterative process, first starting with a reasonable RESET pulse, then optimizing the SET pulse. Just as with flash memory, it is possible to over-stress the cell and permanently damage it. Because the RESET voltage is the largest, the search for the appropriate RESET voltage must be done with care.
Figure 3: In a GST-based PCM memory device, application of heat by a resistor converts the crystalline material into the amorphous phase (orange half-circle) in what is known as the forming process.
The R-I curve is a typical phase-change NVM device measurement. The SET pulse voltage is increased while the RESET and SET resistance values are being measured. Figure 4 shows a four-pulse waveform for one point in the R-I curve, which was generated and measured with a single instrument. Note that the entire four-pulse test waveform, which is one step in a SET sweep, requires only tens of microseconds. Some test systems may use SMUs for the resistance measurements, but this requires additional switching and much longer test times. The newest pulse I-V instrumentation available measures the voltage and current simultaneously at multiple points in the test, providing flexibility while ensuring that the proper measurements are made. Here, spot means are taken (green boxes in Figure 4) to capture the measurements needed to produce the resulting R-I curve.
Click image to enlarge.
Figure 4: R-I curve is generated by extracting measurements from this four-pulse waveform. The RESET-measure-SET-measure pulse waveform includes four pulses: the RESET pulse, which puts the material into a high resistance, amorphous state; the pulse that measures the resistance of the RESET state; the SET pulse, which puts the material into a low resistance, crystalline state; and the pulse that measures the resistance of the material in the SET state.
The SET current of the R-I curve usually has the characteristic U shape usually known as a “bathtub” curve (see blue curve in figure 5). Note that the RESET resistance is traditionally displayed with the SET resistance, even though the RESET pulse is not changing throughout the sweep, causing the RESET R to be a straight line. Plotting the RESET R does indicate if the RESET pulse is adequately resetting the material after each SET pulse.
Click image to enlarge.
Figure 5. R-I curve shows the resistance variation of the SET state resistance, based on the data captured from the tops of the pulses shown in Figure 4. The SET curve (blue) displays the characteristic “bathtub” shape.
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R G.Neale
11/15/2012 4:29 AM EST
Peter did you mean this ""Much like other types of NVM technologies, a PCM cell must be formed before it displays the consistent switching necessary to be a memory element.""
While PCM has a number of problems, the need to “form” the device should no longer be necessary. Imagine the problems, cost and time, of forming each bit of an 8G-bit array. Unless the author knows something that we are not being told forming effects should have gone away with the use of the crystallized active material as one electrode in the PCM structure.
In the distant past, when PCM devices were fabricated with the active material in the amorphous state then there is a first switching (or forming) pulse. This is because the state of disorder, which determines the threshold voltage, of the as deposited film, differs from that of the same material after the first set/reset cycle, also there may have been some element separation that may have an impact on the value of the threshold voltage. While it is still necessary to empirically establish the optimum operating parameters by an iterative process for each new PCM device structure I think the author may have inadvertently confused that process with a need for forming. Once the optimum operating conditions are established with crystallized active electrodes there should be no need for forming.
One other question have the annotations for Current and Voltage been accidentally transposed in Figure 7 or is this a power PCM device??
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Kristin Lewotsky
11/16/2012 6:13 PM EST
Good catch, Ron -- the axes labels on Figure 7 were indeed transposed; look for a corrected version to appear shortly.
Kristin
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resistion
11/16/2012 7:23 PM EST
When you have a resistance-based memory like PCM or STT MRAM and it needs to scale to lower currents, there don't seem to be any chip array testers (not individual cell probes) that can go down to nano amps for read currents. Hope this situation will change.
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