Design Article
Optimizing memory design
Hany Fahmy, Agilent Technologies
11/13/2012 11:00 AM EST
Facing additional questions
The surface current density on the ground planes proved similar to that of the hotspots, with confined return current that occurred with good stitching (see figure 8). With a strong return path discontinuity, there was wide spatial dispersion of the surface current (see figure 9).

My team and I then faced two additional questions: First, does a 10-dB increase in NEXT assure low-risk operation at 1.33 GB/s? Second, does the wide spatial spread of the return currents on the ground planes cause EMI compliance failure of FCC rules? To answer these questions, we needed to model the whole memory channel die-to-die, including the PCB of the mother board, SODIMM connectors, and R/C-F SODIMMs. Here, again, we used simulation for the PCB on the mother board and R/C-F SODIMMs. Next, we modeled the SODIMM connector using a combined method of finite-element modeling simulation and VNA measurements. This provided us with both a causal and passive S-parameter measurement model of the connector.
Using IBIS modeling of the I/O buffers, we then generated the eye-diagram for a 15-ground PTH (see figure 9). The diagram clearly showed low-risk operation at 1.33 GB/s with a setup margin of +100 ps, worst case. The lack of ground PTH caused a failure at 1.33 GB/s.

The three-ground PTH showed a medium-to-low risk operation at 1.33 GB/s with a setup margin of +50 ps, worst case (see figure 10).

At the end of the day, the memory system was a success, thanks in large part to the appropriate application of techniques like the method of moments, use of specialized design tools for electromagnetic simulation and VNA measurements, and the educated decisions my team and I made throughout the design process. The project was not easy, but having the right tools and a team of experienced engineers with which to work definitely made all the difference—an important lesson that any hectic, overworked engineer can learn from these days.
About the author
Hany Fahmy is a Technologist of High-Speed Digital interfaces for signal integrity and electromagnetic compatibility. He works as a high-speed Digital Application Expert at Agilent Technologies, Inc., before joining Agilent Mr. Fahmy was the director of SIE/EMC System Development and Manufacturing at NVIDIA Corp., dealing with the design and analysis of high-speed digital and analog interconnecting systems. Before joining NVIDIA, Mr. Fahmy worked at Intel, Micron, and TI. He has a Ph.D. in Computational Electromagnetics of MMIC from the University of Toronto and a M.Sc. and a B.Sc. from Cairo University in Egypt.
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The surface current density on the ground planes proved similar to that of the hotspots, with confined return current that occurred with good stitching (see figure 8). With a strong return path discontinuity, there was wide spatial dispersion of the surface current (see figure 9).

Figure 8: Image of surface current densities on ground plane shows well-confined return current (top). Strong return path discontinuity results in wide spatial dispersion of the surface current of the device (bottom).
My team and I then faced two additional questions: First, does a 10-dB increase in NEXT assure low-risk operation at 1.33 GB/s? Second, does the wide spatial spread of the return currents on the ground planes cause EMI compliance failure of FCC rules? To answer these questions, we needed to model the whole memory channel die-to-die, including the PCB of the mother board, SODIMM connectors, and R/C-F SODIMMs. Here, again, we used simulation for the PCB on the mother board and R/C-F SODIMMs. Next, we modeled the SODIMM connector using a combined method of finite-element modeling simulation and VNA measurements. This provided us with both a causal and passive S-parameter measurement model of the connector.
Using IBIS modeling of the I/O buffers, we then generated the eye-diagram for a 15-ground PTH (see figure 9). The diagram clearly showed low-risk operation at 1.33 GB/s with a setup margin of +100 ps, worst case. The lack of ground PTH caused a failure at 1.33 GB/s.

Figure 9: An eye diagram for the 15-ground PTH shows low-risk operation at 1.33 GB/s with a setup margin of +100 ps, worst case (top). A failure at 1.33 GB/s caused by the lack of a ground PTH (bottom).
The three-ground PTH showed a medium-to-low risk operation at 1.33 GB/s with a setup margin of +50 ps, worst case (see figure 10).
Figure 10: The three-ground PTH results in a medium-to-low risk operation at 1.33 GB/s with a setup margin of +50 ps, worst case.
Finally, the team’s validation engineer had to determine whether or not spread spectrum should be turned on with the three-ground PTH cost reduction of our eight-layer package? Once again, modeling software came to the rescue. We used it in µwave mode to compute the antenna gain parameters as if the package were working as a non-intended antenna. We found that the antenna gain for a three-ground PTH was 8 dB worse than that of a 15-ground PTH (see figure 11). Consequently, we recommended that spread spectrum be turned on 0.5%. 
Figure 11: The antenna gain for a three-ground PTH (top) is 8 dB worse than that of a 15-ground PTH (bottom).
At the end of the day, the memory system was a success, thanks in large part to the appropriate application of techniques like the method of moments, use of specialized design tools for electromagnetic simulation and VNA measurements, and the educated decisions my team and I made throughout the design process. The project was not easy, but having the right tools and a team of experienced engineers with which to work definitely made all the difference—an important lesson that any hectic, overworked engineer can learn from these days.
About the author
Hany Fahmy is a Technologist of High-Speed Digital interfaces for signal integrity and electromagnetic compatibility. He works as a high-speed Digital Application Expert at Agilent Technologies, Inc., before joining Agilent Mr. Fahmy was the director of SIE/EMC System Development and Manufacturing at NVIDIA Corp., dealing with the design and analysis of high-speed digital and analog interconnecting systems. Before joining NVIDIA, Mr. Fahmy worked at Intel, Micron, and TI. He has a Ph.D. in Computational Electromagnetics of MMIC from the University of Toronto and a M.Sc. and a B.Sc. from Cairo University in Egypt.
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DP23
11/16/2012 5:33 PM EST
RPD = return path discontinuity. It took me a minute to find the original reference to that acronym.
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Kristin Lewotsky
11/19/2012 10:20 AM EST
Thanks for the heads up -- the error has been corrected.
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