Design Article
Memory Test Tips #3: Improving flash memory testing with pulse generators
Dave Rose, Keithley Instruments Inc.
12/10/2012 11:27 AM EST
Using pulse generators
Typical applications for pulse generators include preventing device heating, exposing devices to time-controlled stressing or charging, generating clock signals, testing fuses, and setting and resetting memory devices. A pulse generator can output a voltage in a time-controlled, time-accurate manner, allowing the user to tailor the amount of voltage (pulse height) and the duration of the pulse (pulse width), as well as the voltage ramp rate (rise and fall time). This type of instrument also provides the ability to control the number of pulses output and even to synchronize multiple pulses. Fortunately for memory device manufacturers, a growing number of parametric test systems offer pulse generators as optional equipment (see figure 3).
NAND flash cells fall into two categories: single bit (logical 0/1) and multi bit. As the names imply, in a single-bit cell, each storage location can hold only one bit; in a multi-bit cell, each storage location can hold multiple bits. Single-bit cells require a two-level pulse to set or reset the device, which results in two distinct VT values (see figure 4). Multi-bit cells need multilevel pulses to place the cell in each of its possible states, which requires pulses with from four to eight possible voltage levels.
To program a single-bit cell using FN tunneling, a positive pulse is applied to the gate, while the drain, source, and bulk voltages are set to 0 V (grounded). This causes charge to be pushed into the floating gate. To erase the cell via FN tunneling, a negative pulse is applied to the gate (drain, source, and bulk terminals set to 0 V or connected to ground).
To program the cell using HCI, simultaneous pulses are applied to the gate and drain (source and bulk grounded or set to zero). This causes a field to appear in the transistor channel, thereby creating the necessary hot carriers. The pulse height and polarity of the gate pulse determine whether charge is applied to or removed from the floating gate.
The threshold voltage is usually measured afterward to ensure that the cell has indeed been programmed or erased. If one programs and erases the cells thousands of time, one can monitor its lifetime. (For the sake of simplicity, this article focuses only on single-bit flash memory cells.)
Measurement considerations
A parametric test system is oriented primarily toward performing accurate DC measurements. As a result, the switch matrix and relays typically used are designed and optimized for characteristics that ensure good DC performance, such as low leakage current, minimal offset voltages and currents, and low resistances. The optimization of DC performance usually comes at some cost to the system’s AC performance.
In contrast, pulses are essentially AC signals. A square pulse train can be represented by the Fourier expansion as an infinite series of sinusoids:
where T is the period, τ the pulse width, and t is the total time.
Next: Skirting the pitfalls
Typical applications for pulse generators include preventing device heating, exposing devices to time-controlled stressing or charging, generating clock signals, testing fuses, and setting and resetting memory devices. A pulse generator can output a voltage in a time-controlled, time-accurate manner, allowing the user to tailor the amount of voltage (pulse height) and the duration of the pulse (pulse width), as well as the voltage ramp rate (rise and fall time). This type of instrument also provides the ability to control the number of pulses output and even to synchronize multiple pulses. Fortunately for memory device manufacturers, a growing number of parametric test systems offer pulse generators as optional equipment (see figure 3).
Figure 3. The pulse generator for the Keithley S530 offers two to six
channels of pulse outputs, each of which is capable of outputting a
maximum of ±40 VDC with pulse durations from 100 ns to 1 s.
channels of pulse outputs, each of which is capable of outputting a
maximum of ±40 VDC with pulse durations from 100 ns to 1 s.
NAND flash cells fall into two categories: single bit (logical 0/1) and multi bit. As the names imply, in a single-bit cell, each storage location can hold only one bit; in a multi-bit cell, each storage location can hold multiple bits. Single-bit cells require a two-level pulse to set or reset the device, which results in two distinct VT values (see figure 4). Multi-bit cells need multilevel pulses to place the cell in each of its possible states, which requires pulses with from four to eight possible voltage levels.
Figure 4. A single-bit cell (top), which can be
in one of two states,
requires two distinct voltage levels VT for set or reset. Multi-bit
cells (bottom) can be in one of four to eight states, requiring a
pulse generator that can generate four to eight values of VT.
requires two distinct voltage levels VT for set or reset. Multi-bit
cells (bottom) can be in one of four to eight states, requiring a
pulse generator that can generate four to eight values of VT.
To program a single-bit cell using FN tunneling, a positive pulse is applied to the gate, while the drain, source, and bulk voltages are set to 0 V (grounded). This causes charge to be pushed into the floating gate. To erase the cell via FN tunneling, a negative pulse is applied to the gate (drain, source, and bulk terminals set to 0 V or connected to ground).
To program the cell using HCI, simultaneous pulses are applied to the gate and drain (source and bulk grounded or set to zero). This causes a field to appear in the transistor channel, thereby creating the necessary hot carriers. The pulse height and polarity of the gate pulse determine whether charge is applied to or removed from the floating gate.
The threshold voltage is usually measured afterward to ensure that the cell has indeed been programmed or erased. If one programs and erases the cells thousands of time, one can monitor its lifetime. (For the sake of simplicity, this article focuses only on single-bit flash memory cells.)
Measurement considerations
A parametric test system is oriented primarily toward performing accurate DC measurements. As a result, the switch matrix and relays typically used are designed and optimized for characteristics that ensure good DC performance, such as low leakage current, minimal offset voltages and currents, and low resistances. The optimization of DC performance usually comes at some cost to the system’s AC performance.
In contrast, pulses are essentially AC signals. A square pulse train can be represented by the Fourier expansion as an infinite series of sinusoids:
where T is the period, τ the pulse width, and t is the total time.
Next: Skirting the pitfalls
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