Design Article
Memory Test Tips #3: Improving flash memory testing with pulse generators
Dave Rose, Keithley Instruments Inc.
12/10/2012 11:27 AM EST
Skirting the pitfalls
Because the switching subsystem of the parametric tester is optimized for DC, it has a bandwidth limited to less than 30 MHz. This constraint can cause distortions in the pulse signal, such ringing, overshoot, and other harmonic distortions. Given that setting and resetting a flash cell is essentially charge transfer, significant waveform distortions will change the amount of charge that is transferred, potentially resulting in the flash cell being placed in an indeterminate (undefined) state.
To reduce these distortions, the higher frequency content of the pulse signal must be reduced. This can be done by slowing down the pulse transitions (rise and fall times) or reducing the pulse width. A good rule of thumb is to keep the rise and fall times greater than 50 ns and the pulse widths greater than 150 ns.
Another cause of pulse distortions is impedance mismatches. If the impedances in the signal path are not matched, they will cause signal reflection at the interfaces. When combined with the incident signal, these reflections will amplify some of the frequency content of the pulse and reduce others, the net effect being a distorted pulse.
The two sources of impedance mismatch are the DUT and the tester’s switching subsystem. In the case of the tester's impedance, the pulse generator can compensate to some extent for the mismatch. This compensation can be achieved by selecting the correct output impedance for the pulse generator, typically either 50 Ω or 1 kΩ. This can also help a bit with the impedance mismatch caused by the impedance of the switching subsystem, which is around 90 Ω. There are few things that can be done to compensate for impedance mismatches due to the impedance of the DUT.
Pulse generators, being time-based instruments, do not have Kelvin sensing capabilities; that is, they cannot sense whether the voltages that they are outputting are being accurately applied to the DUT. As a result, they cannot sense any voltage losses caused by the interconnecting cables, switch matrix, or the impedance of the DUT itself. Typically, pulse generators correct for these losses by calculating how much voltage should be applied given the amount of impedance at the DUT. This is usually done through a user-supplied impedance value.
One of the main advantages of using a pulse generator incorporated into a parametric test system for flash memory testing is that these systems include a library of commands useful for controlling the pulse generator and automating the testing process.
The enterprise SSD sector has become an ever more important market for flash memory, one where reliability is key. Memory manufacturers need to accurately assess the lifetime of their products. By working with pulse generators instead of DC sources and carefully adjusting parameters, test teams can deliver the best possible results
Further reading
This article is the third of a series. To learn more about memory testing, see:
Memory Test Tips #1: Alternative NVM technologies require new test approaches—PCM
Memory Test Tips #2: Alternative NVM technologies require new test approaches—FRAM
About the Author
Dave Rose is a senior staff applications engineer at Keithley Instruments, I
nc. in Cleveland, Ohio, which is part of the Tektronix test and
measurement portfolio. Dave joined Keithley in 1987 and has spent
roughly half of his career in design engineering and the other half in
applications engineering.
Because the switching subsystem of the parametric tester is optimized for DC, it has a bandwidth limited to less than 30 MHz. This constraint can cause distortions in the pulse signal, such ringing, overshoot, and other harmonic distortions. Given that setting and resetting a flash cell is essentially charge transfer, significant waveform distortions will change the amount of charge that is transferred, potentially resulting in the flash cell being placed in an indeterminate (undefined) state.
To reduce these distortions, the higher frequency content of the pulse signal must be reduced. This can be done by slowing down the pulse transitions (rise and fall times) or reducing the pulse width. A good rule of thumb is to keep the rise and fall times greater than 50 ns and the pulse widths greater than 150 ns.
Another cause of pulse distortions is impedance mismatches. If the impedances in the signal path are not matched, they will cause signal reflection at the interfaces. When combined with the incident signal, these reflections will amplify some of the frequency content of the pulse and reduce others, the net effect being a distorted pulse.
The two sources of impedance mismatch are the DUT and the tester’s switching subsystem. In the case of the tester's impedance, the pulse generator can compensate to some extent for the mismatch. This compensation can be achieved by selecting the correct output impedance for the pulse generator, typically either 50 Ω or 1 kΩ. This can also help a bit with the impedance mismatch caused by the impedance of the switching subsystem, which is around 90 Ω. There are few things that can be done to compensate for impedance mismatches due to the impedance of the DUT.
Pulse generators, being time-based instruments, do not have Kelvin sensing capabilities; that is, they cannot sense whether the voltages that they are outputting are being accurately applied to the DUT. As a result, they cannot sense any voltage losses caused by the interconnecting cables, switch matrix, or the impedance of the DUT itself. Typically, pulse generators correct for these losses by calculating how much voltage should be applied given the amount of impedance at the DUT. This is usually done through a user-supplied impedance value.
One of the main advantages of using a pulse generator incorporated into a parametric test system for flash memory testing is that these systems include a library of commands useful for controlling the pulse generator and automating the testing process.
The enterprise SSD sector has become an ever more important market for flash memory, one where reliability is key. Memory manufacturers need to accurately assess the lifetime of their products. By working with pulse generators instead of DC sources and carefully adjusting parameters, test teams can deliver the best possible results
Further reading
This article is the third of a series. To learn more about memory testing, see:
Memory Test Tips #1: Alternative NVM technologies require new test approaches—PCM
Memory Test Tips #2: Alternative NVM technologies require new test approaches—FRAM
About the Author
Dave Rose is a senior staff applications engineer at Keithley Instruments, I
nc. in Cleveland, Ohio, which is part of the Tektronix test and
measurement portfolio. Dave joined Keithley in 1987 and has spent
roughly half of his career in design engineering and the other half in
applications engineering.
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