datasheets.com EBN.com EDN.com EETimes.com Embedded.com PlanetAnalog.com TechOnline.com  
Events
UBM Tech
UBM Tech

Design Article

Tech trends: Details on Everspin's ST-MRAM

Kristin Lewotsky

1/2/2013 12:18 PM EST

Tackling the market
Although Everspin will continue to manufacture its toggle MRAM, ST-MRAM allows them to deliver a higher capacity product, aimed at the enterprise storage market. They have their work cut out for them, of course. Until such a time as the volumes are high enough to introduce economies of scale, ST-MRAM will cost more than the incumbent technologies. That’s not necessarily an obstacle for the applications the company’s targeting, though, which include caches and buffers for enterprise storage systems. “These require persistent memories or DRAM with battery backup so that the data can be retained power is cut off,” says LoPresti. “The system costs of these buffers and storage devices is actually quite expensive when you factor in the battery, super caps, the overhead for firmware, and validation being able to protect the data in flight. From a total cost of ownership, ST-MRAM actually becomes very competitive.”

As far as manufacturing goes, Everspin has a 200-mm fab at its facility. They use an outside foundry to partially process the wafers, then use the on-site fab to add final layers and probe the bits before sending the product to off-site assembly and test facilities. Having a single manufacturing line hasn’t been a problem for the company in the past, given that they designed their toggle MRAM modules to be pin compatible with alternate non-volatile SRAM solutions, and now their 64-Mb ST-MRAM is pin compatible with DDR3 DRAM.

High-reliability applications, however, frequently require vendors to have multiple facilities to guard against supply-chain disruption. Everspin is currently in the process of establishing a second, geographically-separated back-end line. That will allow them to qualify both of their MRAM product lines for applications like automotive. They’re also looking ahead to larger wafer sizes. “In the case of spin torque MRAM, we’re going into volume production in our 200 mm fab but our long-term plan is to work with foundries and establish back end wafer fab capability at their facilities so that we’ll have that built in when we start switching to 300-mm wafers,” says LoPresti.

Modules are already under test with multiple vendors. At the 2012 Accelerating Innovation Summit, for example, LSI ran a demo using an ST-MRAM DIMM module as a cache in a fourth-generation 12 Gb/s SAS/SATA ROC evaluation platform.

As conventional memory technologies begin to reach their limits, the industry is hard at work on viable alternatives. Everspin’s ST-MRAM offering represents an important step in terms of being competitive in the future. "Toggle MRAM had difficulty scaling because current densities went through the roof as the process technology shrank,” says analyst Jim Handy of Objective Analysis. “With ST-MRAM, that’s no longer an issue. Everspin should be able use the most advanced process technologies to scale its MRAMs over the long term, leading to higher densities and lower costs."

That’s not to say that the company doesn’t have significant challenges ahead of it. They’re fighting for a piece of the same market as ferroelectric RAM (FRAM), which puts them in competition with Cypress via its Agiga/Ramtron acquisitions, Handy says. “It's a very nichey market, though, and purchases are unlikely to be won or lost based on price alone," he notes. "Most likely, the company with the best technical support will win—if Cypress' field applications engineers work closely with the customer then Cypress will get the design, and if Everspin gets there first or gives more support than Everspin will win the design.  After that, the buyer won't have the ability to choose one company's part over another's because they are not pin compatible.”

Next: MRAM 101




greenpattern

2/6/2013 12:03 PM EST

Writing '0' or '1' to one row of ST-MRAM might disturb next row from cumulative magnetic field.

Sign in to Reply



resistion

2/6/2013 6:52 PM EST

"Make the cell too small, and you run the risk of degrading data stability unless you can boost Eb. Working with an asymmetric bit shape and thicker ferromagnetic layers can modestly increase Eb, but choosing a material with higher magnetization provides much greater benefit" seems to suggest must continually change materials to scale. But that's not practical scalability.

Sign in to Reply



resistion

2/6/2013 7:15 PM EST

It's been said perpendicular STT can't scale current below ~30 uA.

http://www.hes.ei.tum.de/fileadmin/w00bjl/www/uploads/Session_s8p1-ID248_IEDM_P-ST_MRAM_UKlostermann.pdf

Sign in to Reply



Please sign in to post comment

Navigate to related information

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)