Tech trends: Details on Everspin's ST-MRAM

MRAM 101

An MRAM device consists of an array of cells that each incorporates a magnetic tunnel junction (MTJ) and a transistor; the level of resistance in an MTJ determines whether it is read out as a 1 or a 0. The basic MTJ structure—the bit—consists of a fixed ferromagnetic layer and a “free” ferromagnetic layer whose polarity can be modified; the two are separated by a dielectric layer thin enough that electrons can tunnel through. Writing to a cell involves setting the magnetic moment of the free magnetic layer for that cell. That alters the cell resistance, which is read out by a transistor. A grid of write lines consisting of an array of word lines crossing an orthogonal array of bit lines allows us to independently address each cell in the array by energizing the appropriate word line and bit line.

The resistance of a bit is essentially a function of the strength of the tunneling effect, which in turn depends on the polarity of the two magnetic layers relative to one another. Ordinary current is made up of electrons with random spin direction (spin up and spin down), but the tunneling current between magnetic materials is spin polarized, having more of one spin direction. Electrons that “match” the polarity of a ferromagnetic layer (spin up or spin down) and have sufficient energy will tunnel through the thin dielectric “tunnel barrier” layer and the remainder will largely be lost to backscatter.

When the fixed and free magnetic layers of an MTJ are parallel, the spin states of the electrons that pass through the  tunnel barrier tend to match. This makes them more likely to tunnel through the dielectric layer, leading to current flow (the low resistance state, or “1”). When the polarity of the two magnetic layers is antiparallel, nearly all of the electrons that pass through the tunnel barrier layer undergo backscattering from the opposite electrode (the high resistance state, or “0”).

This is a simple model for discussion but in reality the process is a bit more complicated. In general, bits tend to be magnetically anisotropic as well as structurally asymmetric. As a result, they have stable, low-energy magnetic states parallel to their long, or “easy” axis and higher-energy states along their short, or “hard” axis). Storing data in an MRAM bit requires orienting the magnetic domain to one of two stable states along the easy axis (0º and 180º) that correspond to the low-and high-resistance states. To switch between the two, the polarity of the magnetization has to sweep through the hard axis (90º).

Early MRAM devices switched the magnetization using used current pulses to induce magnetic fields that then flipped the polarity. To switch cells independently, devices divided the current required to generate the necessary field between the word line and the bit line so that only the cell at the intersection of two switched. Other cells energized by the word line alone would be unaffected.

It’s a good idea in theory but we live in the real world, and normal material variation means that there is not one single voltage required for switching but rather a distribution—some bits require lower fields for switching than others. This gives rise to a problem known as half select disturbs, in which just energizing the word line might be enough to switch some bits inadvertently.

Toggle MRAM addresses this problem by splitting the free magnetic layer into a pair of magnetic layers separated by a buffer and rotating the orientation of the MTJ 45º. As a result, flipping the polarity of cells in the free layer for a write operation becomes a two-step process that involves an intrinsic phase lag. That lag guards against half select disturbs, increasing data stability.

Toggle MRAM is far from perfect, however. Switching current does not scale as MTJ size, which decreases the area efficiency of the array.  It also limits its write bandwidth, preventing DDR3 compatibility, for example. ST-MRAM provides solution by flipping the bits directly using the spin-polarized tunneling current rather than using electrically induced localized magnetic fields.

In ST-MRAM, switching is no longer accomplished by flowing current through the grid of write lines, but rather by applying current directly through the MTJ and transistor. The electrons that pass through the fixed magnetic layer are polarized to primarily spin up or spin down orientation. When the free layer is antiparallel to the fixed layer, electrons that tunnel through exert a torque on the magnetic moment of the free layer, causing it to flip polarity (the write operation). Switching from parallel to antiparallel is also accomplished through spin torque transfer, however, in this case electrons of opposite spin reflect from the fixed layer to switch the free layer.  Although ST-MRAM write operations take more current than ST MRAM read operations, they do not require nearly as much as toggle MRAM. As a result, cell sizes can get significantly smaller without the risk of excessively high current densities causing heat-related damage.

References
1. J.M. Slaughter, N.D. Rizzo, J. Janesky, et al, "High Density ST-MRAM Technology (Invited)," in Proceedings of International Electronic Devices Meeting (IEDM), paper 29.3; San Francisco, CA (2012).