Design Article
Memory 101: What you need to know about FRAM, part 1
Joe Evans, Radiant Technologies Inc.
2/12/2013 1:00 PM EST
Embedding FRAM
The dominating factor in all memory markets is price per bit. FRAMs have yet to reach the manufacturing efficiency of DRAM and flash so they cannot compete on a cost-per-bit basis in stand-alone memories. When used as embedded memory, however, FRAMs provide a universal functionality that can reduce total system cost, complexity, and energy consumption even if the memory itself is a little more expensive. The primary cost advantage is that ferroelectric capacitors can be embedded into a CMOS logic process, eliminating the extra process steps and mask levels required to add DRAM, flash, and/or EEPROM memory to the logic-level CMOS.
The Texas Instruments MSP430FRxxxx family of microprocessors with FRAM is one application of embedded FRAM. Fujitsu, on the other hand, takes advantage of the high speed and low power of FRAM in its product line of RF tags (the MB89Rxxx and MB97Rxxx series). FeRAM embedded in the RF tag in place of EEPROM is more than 10,000 times faster for the write operation and requires far less power. These improved characteristics are not just numbers on a spec sheet. They are noticeable to the user. Meanwhile, Ramtron first targeted battery-backed SRAM and EEPROM sockets but now has a diverse portfolio offering embedded and RF products plus memories for smart meters.
Although FRAM did not take over the entire memory market as hoped by a few, it is now having an impact. FRAM products are presently available from or being made by Ramtron (now Cypress Semiconductor), Texas Instruments, Fujitsu, and Matsushita. Several other companies have the capacity to offer ferroelectric-based products should they decide to do so.
NOTE: Ferroelectric RAM is known by a variety of names, some trademarked: F-RAM, FRAM, and FeRAM. For this article, the term FRAM is used but it represents all of the different product types.
True hysteresis
By definition, any memory device must have one parameter that crosses a zero potential energy axis at two or more distinct points where those intersections are determined by prior environmental stimuli. Typically, the ferroelectric hysteresis loop is shown centered on the origin, placing the two Y-axis crossing points above and below the origin (see figure 1). For comparison, the data plot below also shows the "hysteresis" of a linear capacitor.
To the electrical circuits of an FRAM, the hysteresis loop does not look like that shown in Figure 1 but instead is offset up or down by the memory effect. The hysteresis loop of an FRAM capacitor starting in the direction opposite to the direction of a read voltage looks like the curve in Figure 2.
The capacitor starting in the same direction as the read voltage looks completely different (see figure 3).
During the read operation, the sense amplifier sees only the upper right-hand quadrants of Figure 2 and Figure 3, leading to the loops in Figure 4. These half-hysteresis loops are the two possible bit line voltage potentials from which the sense amplifier must choose during a read operation.
Lead zirconate titanate (PZT) is the preferred ferroelectric material in FRAMs today although strontium bismuth niobate tantalate (SBNT) is also used commercially. The loops above are from 1500-Å-thick niobium-doped PZT.
In part two of this article, the author discusses the specifics of the read and write process with a particular focus on the requirements placed on the ferroelectric capacitor.
About the author
Joe T. Evans, Jr., is president of Radiant Technologies Inc. (Albuquerque, NM), which manufactures test equipment for measuring ferroelectric, piezoelectric and pyroelectric properties. The company also fabricates integrated thin-film piezoelectric and ferroelectric products as embedded references in its test equipment. Joe earned a B.S. in electrical engineering as a Distinguished Graduate from the United States Air Force Academy in 1976. Upon completing undergraduate pilot training, he served as a flight instructor in the supersonic T-38 Talon. After earning an MS in electrical engineering from Stanford University, Joe was assigned to the Air Force Weapons Laboratory. He left the Air Force in 1984 and co-founded Krysalis Corp., becoming the first to create thin ferroelectric films on silicon substrates and in 1987 fabricating the first fully functional CMOS ferroelectric random access memory. He subsequently co-founded Radiant Technologies, Inc. in 1988 and has worked on a variety of issues in ferroelectric materials since that time including FRAM, ferroelectric capacitor reliability, and piezoelectric MEMs. His present goal is to create useful form factors for thin-ferroelectric-film capacitors so engineers can use these devices in circuits and ICs.
Acknowledgement
The author would like to acknowledge the contribution by the following people for their review of and suggestions for this article: Richard Womack of Rio Grande Micro; Glen Fox of Fox Materials Consulting; and Bob Howard, Spencer Smith, Scott Chapman, and Michelle Bell, all of Radiant Technologies Inc.
Related articles:
Industry View: Objective Analysis on Cypress, Ramtron
Alternative NVM technologies require new test approaches, part 2
Top 5 memory trends for 2013
Non-volatile memory development gathers steam
The dominating factor in all memory markets is price per bit. FRAMs have yet to reach the manufacturing efficiency of DRAM and flash so they cannot compete on a cost-per-bit basis in stand-alone memories. When used as embedded memory, however, FRAMs provide a universal functionality that can reduce total system cost, complexity, and energy consumption even if the memory itself is a little more expensive. The primary cost advantage is that ferroelectric capacitors can be embedded into a CMOS logic process, eliminating the extra process steps and mask levels required to add DRAM, flash, and/or EEPROM memory to the logic-level CMOS.
The Texas Instruments MSP430FRxxxx family of microprocessors with FRAM is one application of embedded FRAM. Fujitsu, on the other hand, takes advantage of the high speed and low power of FRAM in its product line of RF tags (the MB89Rxxx and MB97Rxxx series). FeRAM embedded in the RF tag in place of EEPROM is more than 10,000 times faster for the write operation and requires far less power. These improved characteristics are not just numbers on a spec sheet. They are noticeable to the user. Meanwhile, Ramtron first targeted battery-backed SRAM and EEPROM sockets but now has a diverse portfolio offering embedded and RF products plus memories for smart meters.
Although FRAM did not take over the entire memory market as hoped by a few, it is now having an impact. FRAM products are presently available from or being made by Ramtron (now Cypress Semiconductor), Texas Instruments, Fujitsu, and Matsushita. Several other companies have the capacity to offer ferroelectric-based products should they decide to do so.
NOTE: Ferroelectric RAM is known by a variety of names, some trademarked: F-RAM, FRAM, and FeRAM. For this article, the term FRAM is used but it represents all of the different product types.
True hysteresis
By definition, any memory device must have one parameter that crosses a zero potential energy axis at two or more distinct points where those intersections are determined by prior environmental stimuli. Typically, the ferroelectric hysteresis loop is shown centered on the origin, placing the two Y-axis crossing points above and below the origin (see figure 1). For comparison, the data plot below also shows the "hysteresis" of a linear capacitor.
Figure 1: Linear (black) and ferroelectric (blue) hysteresis loops
To the electrical circuits of an FRAM, the hysteresis loop does not look like that shown in Figure 1 but instead is offset up or down by the memory effect. The hysteresis loop of an FRAM capacitor starting in the direction opposite to the direction of a read voltage looks like the curve in Figure 2.
Figure 2: DOWN Loop
The capacitor starting in the same direction as the read voltage looks completely different (see figure 3).
Figure 3: UP loop
During the read operation, the sense amplifier sees only the upper right-hand quadrants of Figure 2 and Figure 3, leading to the loops in Figure 4. These half-hysteresis loops are the two possible bit line voltage potentials from which the sense amplifier must choose during a read operation.
Figure 4: UP and DOWN bit line voltages during the read operation.
Lead zirconate titanate (PZT) is the preferred ferroelectric material in FRAMs today although strontium bismuth niobate tantalate (SBNT) is also used commercially. The loops above are from 1500-Å-thick niobium-doped PZT.
In part two of this article, the author discusses the specifics of the read and write process with a particular focus on the requirements placed on the ferroelectric capacitor.
About the author
Joe T. Evans, Jr., is president of Radiant Technologies Inc. (Albuquerque, NM), which manufactures test equipment for measuring ferroelectric, piezoelectric and pyroelectric properties. The company also fabricates integrated thin-film piezoelectric and ferroelectric products as embedded references in its test equipment. Joe earned a B.S. in electrical engineering as a Distinguished Graduate from the United States Air Force Academy in 1976. Upon completing undergraduate pilot training, he served as a flight instructor in the supersonic T-38 Talon. After earning an MS in electrical engineering from Stanford University, Joe was assigned to the Air Force Weapons Laboratory. He left the Air Force in 1984 and co-founded Krysalis Corp., becoming the first to create thin ferroelectric films on silicon substrates and in 1987 fabricating the first fully functional CMOS ferroelectric random access memory. He subsequently co-founded Radiant Technologies, Inc. in 1988 and has worked on a variety of issues in ferroelectric materials since that time including FRAM, ferroelectric capacitor reliability, and piezoelectric MEMs. His present goal is to create useful form factors for thin-ferroelectric-film capacitors so engineers can use these devices in circuits and ICs. Acknowledgement
The author would like to acknowledge the contribution by the following people for their review of and suggestions for this article: Richard Womack of Rio Grande Micro; Glen Fox of Fox Materials Consulting; and Bob Howard, Spencer Smith, Scott Chapman, and Michelle Bell, all of Radiant Technologies Inc.
Related articles:
Industry View: Objective Analysis on Cypress, Ramtron
Alternative NVM technologies require new test approaches, part 2
Top 5 memory trends for 2013
Non-volatile memory development gathers steam
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