Voltage-controlled MRAM: Status, challenges and prospects

Magnetic random access memory (MRAM) using the spin-transfer torque (STT) effect has developed into a very active area of research and development over the past decade. Years of research have been followed by increased interest from the industry in recent years. The first 64-Mbit STT-MRAM product was announced by Everspin Technologies in late 2012, and several other companies are actively developing the technology and expected to follow with products in the near future.

STT-MRAM provides nonvolatile storage of information, high read and write speeds, lower energy dissipation compared to existing and emerging nonvolatile memories such as flash and resistive RAM (see figure 1), and very high endurance, making it a promising candidate as a nonvolatile RAM for both embedded and standalone applications. Overall it provides orders of magnitude improvements over the currently dominant nonvolatile flash memories in every aspect except for density and, hence, cost per bit.



STT-MRAM: Switching current and retention time
One way of looking at the potential benefits of adopting MRAM is by reviewing the present memory hierarchy in terms of speed and density, ranging from slow, ultra-high-density memories used for storage such as hard disk drives and NAND flash, to ultrafast but very low-density memories such as SRAM (see figure 2). STT-MRAM can potentially deliver an advantage in terms of this density/speed tradeoff, in addition to bringing nonvolatility to the lower right corner of the plot, which is currently occupied by volatile memories such as SRAM and DRAM.



STT-MRAM typically uses a one transistor, one magnetic tunnel junction (MTJ) or 1T-1MTJ structure (see figure 3), in which a CMOS transistor is used as a select device and drives the write currents through the bit for writing of information. Opposite bits of information are written using currents of opposite directions. The bit itself consists of an MTJ, in which information is encoded as the relative orientation of a magnetic free layer with respect to a magnetic fixed, or pinned, layer. At scaled technology nodes, the magnetization of both films will be perpendicular to the sample plane (up or down) to take advantage of the built-in magnetic anisotropy of the material, as opposed to using in-plane shape to define the stable bit directions, an approach that is not scalable.



This current-controlled 1T-1MTJ structure implies that the density of STT-MRAM is defined by the size of its access transistor (rather than the size of the magnetic bit), which, in turn is proportional to the write current of the magnetic bit. The lower the switching current I_c of the MTJ, the smaller the corresponding access transistor, and, hence, the larger the memory density. In addition, smaller switching currents also result in lower write energies for the STT-MRAM bits, thereby improving the energy efficiency of the memory. Hence, reduction of the switching current I_c is an important driving force in STT-MRAM development for practical applications with low power and/or high density requirements.