Design Article
Tell us What You Think
We want to know what you thought about this Design. Let us know by adding a comment.
Road to ARM TechCon: Cortex-A9 Processor Optimization Pack
Rahoul Varma, ARM
10/15/2012 5:00 PM EDT
Knowledge Transfer
A user guide is delivered with every POP product. This document enables the partner to understand techniques relating to performance exploration and power reduction.
ARM provides implementation scripts through the CPU deliverables that represent the best practice in a given EDA flow. ARM uses this flow as a baseline for the implementation benchmarking carried out as part of the POP development. As part of the POP deliverables, ARM supplements the implementation scripts with guidelines to allow POP licensees to re-produce the benchmarking result within the shortest time frame possible. The documentation contains guidelines on physical implementation and an overview on what parts of the design are most critical to optimize performance. The guidelines also help get the best co-location of cells related to different logic within the hierarchy.
Implementation Results
ARM’s implementation results in Figure 3 provide a summary of an implementation trial with and without the HPK and the FCIs. This trial has been performed with a dual-core Cortex-A9 MP with NEON, floating point unit (FPU), and L2 cache controller (PL310). In this study there is significant improvement in maximum frequency using the Physical IP components exclusive to the POP product.
Time-to-Market Benefits
A typical implementation team spends several months trying to finish a basic implementation of the processor, then iterating several times over to achieve the desired performance targets. The POP represents a proven and credible way to shorten your time to market (TTM) since the iteration and optimization, including physical IP tuning, have already been done by ARM. This saves valuable engineering resources, compute and tool costs in getting your design to market.
POP: A Proven Success
POPs have been successfully licensed and implemented at many of our partners. Panasonic (Japan) and Rockchip (China) engagements are among the announced companies with successful silicon-proven results.
In June 2011, ARM and Panasonic announced the use of a wide range of ARM technology in Panasonic’s recently launched UniPhier SoC for Internet Connected Digital TV applications. ARM technology used in the UniPhier SoC includes high-performance, low-power dual-core ARM Cortex-A9 processors running at up to 1.4 GHz, implemented through the ARM Cortex-A9 POP for a low-power (LP) process. With this partnership, Panasonic was able to deliver the next generation of market-leading UniPhier SoCs for Internet Connected Digital TV devices.
In February 2012, ARM and Rockchip announced the licensing of a wide range of ARM IP for turnkey solutions targeting mass-market, cost-effective Android tablets. This partnership included the Cortex-A9 POP, which enabled a faster time to market for Rockchip. Also, the proven POP approach resulted in a high-performance, low-cost, easy-to-design platform. The combination of Rockchip’s market-leading design experience coupled with a high-performance, energy-efficient processor resulted in a platform that delivers captivating 3D gaming experiences and fluent HD video play back as well featuring a rich set of memory interfaces and peripherals.
Conclusion
Through constructive cooperation between processor implementation, memory, and library design, ARM is able to provide additional value and fine-grained tuning and optimization to a partner processor implementation. ARM has now delivered and enabled many partners with POP solutions that not only deliver the core optimized Physical IP, but a complete solution that can enable accelerated implementation within an unprecedented six to eight weeks. The success of this product has been through a proven PPA point and the proliferation of guidelines and implementation strategies to reproduce the PPA results.
Copyright © 2012 ARM Limited. All rights reserved.
ARM, the ARM logo and Artisan are registered trademarks, and Cortex and Processor Optimization Pack are trademarks of ARM Ltd.
A user guide is delivered with every POP product. This document enables the partner to understand techniques relating to performance exploration and power reduction.
ARM provides implementation scripts through the CPU deliverables that represent the best practice in a given EDA flow. ARM uses this flow as a baseline for the implementation benchmarking carried out as part of the POP development. As part of the POP deliverables, ARM supplements the implementation scripts with guidelines to allow POP licensees to re-produce the benchmarking result within the shortest time frame possible. The documentation contains guidelines on physical implementation and an overview on what parts of the design are most critical to optimize performance. The guidelines also help get the best co-location of cells related to different logic within the hierarchy.
Implementation Results
ARM’s implementation results in Figure 3 provide a summary of an implementation trial with and without the HPK and the FCIs. This trial has been performed with a dual-core Cortex-A9 MP with NEON, floating point unit (FPU), and L2 cache controller (PL310). In this study there is significant improvement in maximum frequency using the Physical IP components exclusive to the POP product.
Time-to-Market Benefits
A typical implementation team spends several months trying to finish a basic implementation of the processor, then iterating several times over to achieve the desired performance targets. The POP represents a proven and credible way to shorten your time to market (TTM) since the iteration and optimization, including physical IP tuning, have already been done by ARM. This saves valuable engineering resources, compute and tool costs in getting your design to market.
POP: A Proven Success
POPs have been successfully licensed and implemented at many of our partners. Panasonic (Japan) and Rockchip (China) engagements are among the announced companies with successful silicon-proven results.
In June 2011, ARM and Panasonic announced the use of a wide range of ARM technology in Panasonic’s recently launched UniPhier SoC for Internet Connected Digital TV applications. ARM technology used in the UniPhier SoC includes high-performance, low-power dual-core ARM Cortex-A9 processors running at up to 1.4 GHz, implemented through the ARM Cortex-A9 POP for a low-power (LP) process. With this partnership, Panasonic was able to deliver the next generation of market-leading UniPhier SoCs for Internet Connected Digital TV devices.
In February 2012, ARM and Rockchip announced the licensing of a wide range of ARM IP for turnkey solutions targeting mass-market, cost-effective Android tablets. This partnership included the Cortex-A9 POP, which enabled a faster time to market for Rockchip. Also, the proven POP approach resulted in a high-performance, low-cost, easy-to-design platform. The combination of Rockchip’s market-leading design experience coupled with a high-performance, energy-efficient processor resulted in a platform that delivers captivating 3D gaming experiences and fluent HD video play back as well featuring a rich set of memory interfaces and peripherals.
Conclusion
Through constructive cooperation between processor implementation, memory, and library design, ARM is able to provide additional value and fine-grained tuning and optimization to a partner processor implementation. ARM has now delivered and enabled many partners with POP solutions that not only deliver the core optimized Physical IP, but a complete solution that can enable accelerated implementation within an unprecedented six to eight weeks. The success of this product has been through a proven PPA point and the proliferation of guidelines and implementation strategies to reproduce the PPA results.
Copyright © 2012 ARM Limited. All rights reserved.
ARM, the ARM logo and Artisan are registered trademarks, and Cortex and Processor Optimization Pack are trademarks of ARM Ltd.
|
|
|
|
|
Navigate to related information