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Design Article

Four soft-core processors for embedded systems

Sven-Ake Andersson, Realtime Embedded

1/8/2013 3:23 PM EST

The OpenRISC
The OpenRISC project was started in 1999 by a group of Slovenian university students. Their aim was to create an open source microprocessor architecture specification and implementation. Two years later, they had produced a complete architectural specification, architectural simulator, and Verilog HDL implementation and made everything publicly available through their new open hardware community, OpenCores.

The OpenRISC 1200 (OR2100) is a synthesizable CPU core maintained by the developers at OpenCores.org. The OR1200 design is an open source implementation of the OpenRISC 1000 RISC architecture. The Verilog RTL description is released under the GNU Lesser General Public License (LGPL).


Pros
  • Everything is open source. RTL source code is available.
  • The ORPSoC reference platform makes it easy to implement an OpenRISC system
  • The GNU toolchain is fully supported
  • A large user community can help solve problems

Cons
  • Few FPGA development boards are supported
  • Complicated debug solutions
  • The Wishbone bus is somewhat outdated
  • The OpenCores website is confusing
  • Many IP blocks are not maintained

Summary
Using the OpenRISC 1200 soft-core processor is a mixed bag. It is hard to find the way through the OpenCores website and there is no obvious starting point for a newbie. But after finding and downloading the hardware and software support files, it is rather easy to build a system and install Linux if choosing the right FPGA development board.

More information
Click Here
to check out the entire OpenRISC-based design process in my blog.

Next: The Nios II




iniewski

1/9/2013 11:51 AM EST

Interesting article Sven...would you be interested in expanding it to a book chapter for the embedded system book I am editing? kris.iniewski@gmail.com

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green_is_now

1/10/2013 5:43 PM EST

You forgot at least one company

Micro-Semi-Actel SmartFusion ARM single Hard core

Probably the lowest power consumption/bit.
but have not checked specs recently.

Zync is impressive...I want a platform, just because of the raw potential.

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Alxx123

1/15/2013 1:02 AM EST

The parallella boards are a cheap way to get a zynq board - $99
http://www.adapteva.com/products/eval-kits/parallella/

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Weatherbee

1/12/2013 11:50 AM EST

First off, being a hardware guy let me say that I love FPGAs. I've had a really difficult time though justifying them for any but the absolute highest end special purpose commercial purposes. I think it is valuable to point out that both hard macro and soft core microprocessors still require external DRAM hanging off of the FPGA to implement a practical soft core processor that can say boot Linux. Does this really make it practical to freely synthesize additional cores after the chip level hardware is locked down? The entire for/against argument changes when you consider synthesizing microcontrollers that use the FPGAs integrated block rams.

Secondly, and I think this is the most important point. FPGAs are just expensive. I'd honestly like to see a table constructed showing say these four soft core processors and calculating based on FPGA cost in similar quantities to standalone uP, logic cells consumed and execution performance a cost in dollars per CoreMark or DMIP.

Even the hard macro based FPGAs seem to be quite pricey (take an honest look at Zync, Fusion and whatever Altera is calling their thing now). Also consider that in nearly every case the hard macro peripheral support is totally inferior to a modern uP SOC. Something like CAN or Gig Ethernet, video/graphic accelerators etc. are outrageously expensive to synthesize in these EPP type devices.

For prototyping SOCs I see the picture. As a very specialized PCIe attached coprocessor for your signal processing application or to implement custom high speed logic I see it. But I just don't the value proposition when it comes to replacing the function of a dsp or microprocessor in designs that by their very nature (using FPGAs) are custom already. There it is more of a hobby. Something that us engineers talk our employers into on really shaky arguments because we want to screw around with cool stuff. Show me that I'm wrong. Please!!!

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Weatherbee

1/12/2013 12:04 PM EST

BTW, I didn't mean to imply that SmartFusion was identical in application to Zynq or the Arria SOCs. Obviously the SmartFusion is a microcontroller and doesn't need external RAM, nor is it going to boot "real" Linux (though I don't think that is even a good criteria for this sort of thing). Not to mention that the Actel parts are based on an entirely different market space and value proposition where this hard processor + FPGA fabric thing may actually make some sense.

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Etmax

1/14/2013 7:18 PM EST

I agree on all counts, I've seen projects ruined on a cost basis because of "cool" ideas. Engineers should take a biological approach to design, ie. no dead weight to coin a phrase. A lot of these things are great "ideas", but the application has to need them.

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