Design Article

IMG1

Design the best interconnect for your next RF or microwave circuit

Dr. John Dunn, Applied Wave Research, Inc.

5/16/2007 1:57 AM EDT

Microwave designers have long been aware of the importance of proper interconnect design as a critical step to successful circuit performance. As a matter of fact, one of the distinguishing features of microwave design is to use the interconnect to advantage by creating desired phase changes of the signal in the desired frequency band. Interconnect design can be efficiently carried out only if the circuit design software is capable in three important areas:


  • Models: Designs are only as good as the models used to make up the circuit. It is important that the various parts of the interconnect can be accurately and efficiently modeled. Remember that accuracy is only part of the story. It does little good to have the world's most accurate model if it is difficult to use, slow to simulate, or too limited in its range of validity.
  • Layout and Model Interaction: By necessity, interconnect design involves working with the layout of the critical nets, and modeling the resulting structures. It is important that the designer be able to quickly layout the necessary nets, and obtain (extract) the corresponding models. Often this involves sending the interconnect layout to an electromagnetic simulator or extraction tool.
  • User Interface and Simulation: It is important that the designer be able to simulate the design efficiently, in order to see how the interconnect affects the performance. This often involves switching between different simulators, annotating schematics, and updating graphs. A poorly designed user interface will make it difficult to carry out these tasks easily.

There have been a number of exciting new developments in these three areas in the past few years. It is now possible to account for the interconnect effects in the circuit much more efficiently and accurately. Part of this is due to increased computer power. For example, electromagnetic simulations can be carried out on much larger structures than before. Less well known are improvements made in the areas listed above. This paper describes these recent developments.

Figure 1 summarizes new interconnect modeling software ideas. The figure is broken up into two regions, the microwave region and the radio frequency IC (RFIC) region. Each of these two design regimes has its own set of requirements. The classic microwave type of design process, be it for a package, board, or microwave IC (MIC), is typically frequency centric. The interconnect is long enough that distributed models are required. Well-defined ground planes make it useful to use S parameter descriptions of elements. Either planar or 3D EM simulators are used to help develop models. The RFIC designer usually works both in the time and frequency domains. The interconnect structures are small compared to a wavelength, and therefore can be modeled with lumped elements effectively.


Figure 1

Interconnect Model Basics
In its most general sense, a model is any mathematical description of a portion of the interconnect. Models for interconnect components come in three basic varieties: closed-form models, quasi-static electromagnetic models, and data-based models.

Closed form models are the traditional models we have all grown to know and love. They consist of formulas describing the electrical properties of the object. For example, microstrip line models give formulas for the either the line's impedance and propagation characteristics, or its electrical parameters (R,L,C,G) per unit length. The formulas are either analytically derived from a simplified geometry, or they are the result of curve fitting to numerical data. Closed form models have significant advantages. They can be moderately accurate (errors of a few percent, typically) and are extremely fast to calculate. As a result, they are ideal candidates for tuning and optimization studies.

Quasi-static electromagnetic based models get their electrical parameters for the transmission lines from a quasi-static solution of the cross sectional geometry of the line and its ground plane. Quasi-static solutions can more accurately predict the line parameters over a larger range of physical parameters (width, dielectric constant, line thickness, etc.) than can closed form models.

There are different methods used to solve for the parameters, with the most popular ones being based on moment method or boundary element methods. In this approach, the charge is solved on the surface of the conductors, and the capacitance and associated parameters are derived. The method assumes that the conductor loss increases in frequency as the square root of frequency, which is usually called the "skin depth approximation." This approximation is valid for boards, packages, and MIC technologies. It falls down, however, for RFIC technologies in silicon. Fortunately, alternative methods now exist using the finite element method, which can account for the more complicated loss behavior in silicon due to the lossy silicon substrate and small cross sectional dimensions of the line.

Data based models are often the network dataset of the element (S, Y, or Z parameters). The data typically come from either measurements or electromagnetic simulations. The main advantage of these models is that they are extremely accurate (assuming the measurements and/or simulations have been carried out carefully). There are, however, some disadvantages. First, the models must be interpolated and extrapolated in frequency if data do not exist at needed points. (Typical situations where this occurs is when a DC bias point is needed for the circuit, or harmonic frequencies are needed for a harmonic balance simulation.) Second, S parameter models are straightforward to use for frequency domain simulations, but are awkward for time domain ones. (This limitation will be discussed later in the user interface and simulation section of this paper.)

Recent Developments in Interconnect Models
So what is new in interconnect models? Much work has been done to increase the generality and robustness of cross-sectional electromagnetic based line models. New methods have removed the skin depth approximation, which is not valid for silicon RFIC lines. Sophisticated substrate effects can be included, such as accurate modeling of the frequency dependent capacitive coupling to the silicon substrate.

A second interesting area is the development of more accurate discontinuity models. A discontinuity is the interconnect connecting two sections of line, for example, microstrip junctions of various kinds. The classic model is closed form, with all of the advantages and limitations already mentioned. A newer approach has been to use electromagnetic simulators to create data table models.

There are some drawbacks to this technique. First, the EM simulations can take considerable time if the results are not already available. Second, EM simulations can give results that are not physical. For example, an open stub may have an S parameter greater than 1 when numerical errors are included. This can lead to all kinds of problems when the data are later used. Finally, this technique is not well suited for tuning and optimization, because there are separate data sets at discrete parameter values.

A more sophisticated approach is to start with a simple closed model form and determine the element parameters by fitting them to electromagnetic simulation results. For example, one might start with two inductors and a capacitor in a Tee configuration to model a microstrip bend. The values of the inductors and capacitor are determined by fitting to S parameter data. In this manner, the model is accurate, yet is still fast enough to run in optimizers efficiently. Of course, this assumes the electromagnetic simulations and parameter tables have been previously generated. Fortunately, many tables are typically shipped with the software. For example, Applied Wave Research has their X Models, where tables for a large variety of discontinuities and parameter values have already been generated. (The software will generate a new table if one is needed after warning the designer.)

Recent Developments in Layout and Model Interaction
The designer is responsible for laying out the interconnect for his or her system. The problem is that if the layout is drawn before it is modeled, just about all the designer can do is take that finished layout and force it into an electromagnetic simulator. The drawback with this method, other than the simulation taking a long time, is that the designer has no idea if there is a problem with the design until the layout is completed., And if there is a problem, he or she has no idea where it is coming from.

Traditionally, microwave designers have overcome this problem by starting with a schematic that has the various interconnect pieces in approximately the correct positions. Hopefully, the layout will have the lines in about the same position as the schematic (although there is no guarantee of this happening). The layout is connected together, and the underlying models on the schematic give the behavior of the interconnect.

The first problem with this method is that interconnect model choices are limited. For example, perhaps a tapered line model is not available. The second problem is that coupling between lines is not included, unless one deliberately uses a coupled line model. This assumes the designer knows the lines in the layout are coupled. It also quickly gets unwieldy to have several coupled line sections in the schematic.

RFIC designers take a very different approach to interconnect layout. Analog integrated circuits can have tens of thousands of lines, with several hundred of these carrying critical analog signals. Their typical layout flow is to draw the lines without any model whatsoever! Later, in a post-extraction analysis of the circuit, the lines will be modeled as parasitic elements, typically with lumped elements: resistors, capacitors, and possibly inductors. Lumped models are usually adequate for these types of designs, as the lines of interest are electrically very short. However, there is the previously mentioned problem of not knowing the effect of the interconnect on the circuit's performance until after the layout is completed.

Fortunately, there have been a number of new capabilities put into design software in recent years. Three are outlined below.

EM Extraction of Critical Nets
A variety of companies now make it relatively painless to send the interconnect of interest to various EM simulators. The specific simulator can be a traditional planar or 3D simulator in which S parameters are generated. These S parameter blocks can then be used in the subsequent simulations. Of course, details of usage depend on the software being used. It is also possible to get lumped models from extraction software. Two examples of this approach are VeloceRF from Helic and NetAn from OEA. The extracted nets are designed to work well for silicon RFIC designs. VeloceRF also includes silicon substrate effects, which is particularly useful when extracting spiral inductors.

Intelligent Net Layout (iNets)
It can be awkward to lay out nets that obey the physical constraints of the chip, package, or board processes. For example, board designers must be aware of the types of vias they can use, and RFIC designers must obey minimum line width rules and via array rules. In new intelligent layout schemes, the nets are drawn in layout, and are aware of the physical process they are being drawn in. They know the available metal layers, types of allowed vias, and various design rules. For example, they are aware that in MMIC processes simultaneous lines must be drawn on multiple layers with strict overlap requirements. The use of intelligent nets is illustrated in Figure 2. The schematic shows the interconnect as simple wires. The designer can then quickly draw the nets in the layout with the software understanding the physical parameters of the process.


Figure 2

Circuit Extraction
Circuit extraction solves a second important problem for designers: how can models be created once the nets have been laid out? The traditional extraction tools previously mentioned give either S parameters or lumped element nets. Circuit extraction creates a model composed of microwave distributed elements and discontinuity models. For example, the nets might be extracted as coupled line, bend, and via models. The advantages of this technique are that the designer gets a microwave accurate model, with coupling between lines included, which at the same time is much faster to simulate than a large, lumped element netlist. It is therefore not necessary to create a distributed mode from elements in the schematic beforehand, which often misses important effects like line coupling. Circuit extraction technology is available, for example, in Applied Wave Research's software. The models can be customized for board, package, and chip processes. Figure 2 illustrates this approach in which the nets in layout are represented by a circuit model, which includes coupled line and via models where needed. Another example of this technique is Sigrity's package modeling software, where lines are extracted as models, thereby allowing for far greater simulation capacity than if full EM simulation were used.

Recent Developments in the User Interface and Simulation
Software is useful to the designer only if it is easy to use. Otherwise, valuable time will be wasted, and mistakes are probable. Vendors have been improving the user interface where ever possible. Specific vendors have their own techniques for solving this problem, and no attempt will be made here to list all available features. Specific areas of concern that these features address are:

  • Extraction of Nets: It should be relatively painless to select specific nets for EM extraction and ship them to an electromagnetic simulator. Once setup for a given process, the extraction should be fairly transparent to the user. It should be possible to switch between a variety of simulators quickly: planar, to 3D, to lumped element extractors, to circuit extractors.
  • Coordination of Schematic and Layout Views: Circuits have two views, the schematic and layout. It is important that the designer can quickly switch between them, be able to change dimensions of the elements, and access important properties.
  • Library Creation and Maintenance: New models are always being added. It is important that databases be easy to maintain. Important efforts in this direction include the use of open standard database languages such as example XML. The Open Access Consortium is leading the charge in this area by trying to make an open standard for model databases.
  • Switching Between Simulator Types: Designers have appreciated for a long time that there is no "best" type of simulator. Harmonic balance (frequency domain) and Spice (time domain) simulators all have there important uses. The challenge is to make software that makes it easy to switch between time and frequency simulations without having to revise the circuit in major ways. Issues include how to have reasonable, consistent simulation settings between different simulators, how to maintain model consistency, and how to display results in a useful manner.

One important concern is the need to be able to use models in either frequency or time domain. This is not much of a problem for lumped element models, where the elements are not varying in frequency. The story is different with closed form transmission line models and S parameter models.

Frequency dependent models typically have severe problems in transient simulations unless special precautions are taken. For example, a lossy transmission line model can become non-causal or unstable in time domain. Therefore, the time domain models of distributed elements (elements with delay) must be carefully constructed. For example, HSpice has the W element model, which is designed to efficiently model electrically long, lossy transmission lines in time domain. S parameter models are a significant problem in the time domain.

The straightforward technique of convolving the S parameter data with the rest of the circuit is computationally very slow. Fortunately, new methods have been developed in the past few years that model the S parameter data as poles in the complex plane. Then, the poles can be inserted into the transient simulator. This technique has numerous advantages over convolution, the most important one being that it leads to much faster simulations. It is important that the poles are chosen wisely to insure passivity of the resulting model, or problems will occur in the time domain. Fortunately, mathematicians have developed a number of powerful methods to overcome this problem. The methods are available in a variety of vendors' software packages.

Choosing Your Software
Interconnect design is an important part of any modern, high performance, microwave system. Design software has improved in the past few years by giving the designer a much better idea of the effect of the interconnect on his or her design in the process of designing the circuit. Powerful models exist for describing the interconnect as a combination of S parameters and electromagnetically based circuit models. Once laid out, the interconnect can be extracted to powerful EM simulators or extracted as circuit elements. Simulations can be carried out in the time and frequency domains to determine the important performance metrics of the circuit. Perhaps most importantly, all of this can be made relatively transparent to the designer by a well-designed user interface.

About the Author
Dr. John Dunn is a senior engineering consultant at Applied Wave Research, Inc., specializing in signal integrity issues. His areas of expertise include electromagnetic modeling and simulation for high-speed circuit applications. Before joining AWR, he was a professor of electrical engineering at the University of Colorado for 15 years.

Dr. Dunn is the author of twenty papers in technical journals, as well as numerous conference publications, and several invited talks. He received his Ph.D. in applied physics from Harvard University in 1984 and is a senior member of IEEE.


print

email

rss

Bookmark and Share

Joinpost comment




Please sign in to post comment

Navigate to related information

Product Parts Search

Enter part number or keyword
PartsSearch

FeedbackForm