Interest in reconfigurable embedded computing in the defense and aerospace market has grown significantly as new generations of field-programmable gate arrays (FPGAs) present developers with a level of processing performance and potential input/output (I/O) bandwidth that cannot easily be matched by conventional CPU configurations. There are many commercial off-the-shelf (COTS) solutions that allow developers to readily make use of FPGAs for processing, but the real challenge to an application is often measured in terms of I/O bandwidth, latency and connectivity. Military electronic counter measures applications require high bandwidth data input, processing, and data output with minimum latency. The FPGA mezzanine card (FMC) directly addresses the challenges of FPGA I/O by solving the dual problem of how to maximize I/O bandwidth, while still being able to change the I/O functionality.
Darwin’s theory of evolution doesn’t necessarily apply to just the plant and animal world, as evidenced in the embedded computing industry, where only the fittest mezzanine card formats have survived. A wide variety have come and gone, with only the best formats gaining broad market appeal, with some specializing and excelling in niche areas. Others have been consigned to the drawing board of history. The reasons for this are many.
Perhaps the strongest mezzanine format for defense embedded computing is the peripheral component interconnect (PCI) mezzanine card (PMC)1
, which uses the PCI and more recently the PCI-X bus2
, and offers the higher levels of ruggedization defined in the ANSI/VITA 20 standard3
. PMC has succeeded because it has been able to evolve through speed improvements and environmental specifications. It has also been able to meet a wide range of market needs, including sufficient space to implement useful functionality. The latest incarnation of the standard is XMC4
, which replaces the parallel PCI or PCI-X bus with a serial interface, of which the most common protocol supported is PCI Express5
. These interfaces bhave evolved to address the needs of computer systems dominated by conventional processors, and the need for standard interfaces that abstract the specific details of their hosts.
For some applications, however, FPGAs provide the only practical way of achieving the necessary throughput, which could be beyond the capabilities of the existing mezzanine formats. PCI Express or PCI-X, for example, can introduce latencies on the order of a micro second or two. FPGAs can also be used to implement the necessary interfaces, so that the application can take advantage of the direct coupling of processing performance and I/O bandwidth. This applies very well to applications such as electronic counter measures, which can require latencies and bandwidth exceeding the theoretical capabilities of PCI Express (2 GB/s using a x8 interface for PCI Express, generation 1). FPGA mezzanine cards (FMCs)
is aimed at solutions that require the benefits of an FPGA. The elegance of the FMC solution is in its simplicity. FMC modules feature only I/O devices such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), or transceivers. The modules have no on-board processors or bus interfaces, such as PCI-X. Instead, FMC modules take advantage of the intrinsic I/O capability of FPGAs to separate the physical I/O functionality on the module from the FPGA board design of the module’s host, while maintaining direct connectivity between the FPGA and the I/O interface. Although aimed at I/O, FMC can be used for any function that might connect to an FPGA including digital signal processors, memory, or even another FPGA.
The standard shows a lot of promise in terms of longevity because it does not compete with PMC/XMC the recognized mezzanine leader for rugged computing – but rather solves a problem for high-end applications (see figure 1). In fact, the FMC specification leverages some of the benefits of the PMC and XMC specifications. The alternative to using FMC for high bandwidth, low latency data throughput is not to use a mezzanine card at all, but to use a monolithic PCB, an approach that would sacrifice the advantage of flexibility.
Figure 1: FPGA mezzanine cards (FMCs) leverage FPGA capabilities to provide a high-volume, flexible I/O solution.
Mezzanine cards for FPGA-based solutions are not new, but they are invariably based on a proprietary standard, which means users are locked into a particular vendor and the evolution of the standard is not subject to peer review. The general connectivity of the FMC specification includes a large number of parallel and serial connections directly to a host based FPGA (see figure 2).
Figure 2: The FPGA mezzanine card features up to 10 multi-gigabit transceiver (MGT) pairs of serial connections and a number of high pin count (HPC) and low pin count (LPC) parallel connections to the host-based FPGA.