Design Article
Mil-Aero top 10 'How-To' articles for 2012
Anne-Francoise Pele
12/12/2012 10:15 AM EST
#8
FPGA testing for DO-254 compliance
By Aldec
The stringent design assurance guideline imposed by DO-254 for custom micro-coded devices like FPGAs present significant verification challenges within the avionics community. As the complexity of the FPGA design increases, so does the verification activities needed to satisfy the verification objectives of DO-254. As defined in the guidance, verification process activities may be satisfied through a combination of methods such as peer reviews, simulation analyses and tests. For design assurance level A and B, it is critical that all FPGA pin-level requirements are verified through simulation and hardware tests and evidence of results documented and provided. For more, click here.
Test Vectors Generation Process
Next: #7
FPGA testing for DO-254 compliance
By Aldec
The stringent design assurance guideline imposed by DO-254 for custom micro-coded devices like FPGAs present significant verification challenges within the avionics community. As the complexity of the FPGA design increases, so does the verification activities needed to satisfy the verification objectives of DO-254. As defined in the guidance, verification process activities may be satisfied through a combination of methods such as peer reviews, simulation analyses and tests. For design assurance level A and B, it is critical that all FPGA pin-level requirements are verified through simulation and hardware tests and evidence of results documented and provided. For more, click here.
Test Vectors Generation Process
Next: #7
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