Is your repeater-chip HDMI 1.3 compatible?

This is understandable considering that engineers are pressured by ever shorter design cycles, making it almost impossible to study standards with volumes of paper. To reduce study time, this article explains in a concise way the main challenges the HDMI-1.3 standard poses onto a repeater chip.

System Overview
Figure 1 shows an HDMI system comprising a HDMI source, a data link, and a HDMI sink. The entire signal chain consists of three data channels and a clock channel. Each data channel carries the video data for one of the primary color components as well as corresponding control and auxiliary data, such as audio samples or packet headers.

Video data enters the encoder in an 8-bit parallel format and is encoded via 8b/10b coding into a 10-bit parallel format. Equivalent encoding is applied to the 4-bit auxiliary and 2-bit control data. Each type of input data is converted into a 10-bit parallel format. The serializer converts the parallel data into serial 10-bit data packets ready for transmission across the TDMS data link.

On the data link, a 10-bit packet is transmitted during one TMDS clock cycle. Thus, maintaining a ratio of signaling rate to TMDS clock of 10:1.

The HDMI sink consists of a recovery and a receiver section. In the recovery section, data must be recovered from the TMDS link, often highly attenuated due to the insertion losses of the data link cables. This is the place where a repeater chip finds its application. The receiver then processes the recovered data by reversing the processing steps of the source, thus converting the serial TMDS data back into the original, parallel format.