Design Article

IMG1

Key Enablers for 40G Differential Quadrature Phase Shift Keying

Loi Nguyen, Inphi Corporation

11/23/2008 5:47 PM EST

The ever-increasing demand for more bandwidth to the home, office, and mobile devices is driving the deployment of 40G optical communications systems. Beginning in 2006, major carriers began deploying 40G systems in backbone networks, which jumpstarted major development activities in 40G components and systems worldwide.

Transmitting 40G signals over long distances presents significant challenges. At 10G, the modulation format of choice is the conventional on/off keying (OOK) due to its simplicity and low cost. As data rates increase to 40G and beyond, however, chromatic dispersion and, even more important, polarization-mode dispersion (PMD) limit the distance over which the data can be transmitted. In fact, 40G transmission using conventional OOK modulation format is restricted to a distance of 2 km maximum. For longer distances, advanced modulation formats are required.

Differential quadrature phase shift keying (DQPSK) is an important modulation format for next-generation 40G optical transport systems. It has excellent tolerance against chromatic dispersion, PMD, optical add-drop multiplexing (OADM) filtering, and optical noise. In addition, 40G DQPSK is spectrally efficient and can be deployed side by side with current 10G line cards in standard 50 GHz wavelength spacing, which is a big benefit for network operators. This article will discuss key enabling technologies for 40G DQPSK systems and offer a roadmap for future development.

Current Status of 40G DQPSK Systems
The advantages of 40G DQPSK have been demonstrated in laboratories and field trials for many years. However, due to the lack of availability of key enabling components, commercial deployment of 40G DQPSK systems has not been possible until now. Figure 1 shows a typical block diagram of a 40G DQPSK line card using commercially available components, which includes modulators, modulator drivers, MUX/DEMUX, and demodulators/receivers. These are the key enabling components for 40G DQPSK systems.


Modulators
Modulators convert electrical data into optical bit stream. DQPSK is a phase modulation format that converts two bits of data in the electrical domain into a single bit of data in the optical domain. The bit in the optical domain can have four possible values, "0," " π/2," "π." and "3 π/2" versus two possible values "0" and "1" in the electrical domain. Thus, it is possible to encode the data at a rate of 2 bits/symbol transmitted (a symbol is an optical bit) and reduce the transmission rate by a factor of 2. Currently, the technology of choice is Lithium Niobate (LN) modulator in metal package with GPPO connectors. Fujitsu and Sumitomo Osaka Cement Company (SOCC) modulators are the two popular choices for 40G DQPSK. Both require approximately 8Vpp differential RF drive.


Drivers
It is important to match the performance of the modulator and driver for optimum performance. Impedance mismatch between the modulator and driver results in excessive jitter due to multiple reflections. Drive voltage is optimized based upon modulator size, bandwidth, insertion loss, and material properties. Early 40G DQPSK modulators required a drive voltage as high as 12Vpp, which put severe demands on the driver in terms of reliability and power consumption. The current modulators from Fujitsu and SOCC require approximately 8Vpp differential, which can be met with current driver technology.

Figure 3 shows a photo of a 40G DQPSK modulator driver. This driver delivers an output voltage of 8Vpp differential and is well matched with both the Fujitsu and SOCC modulators. Its high gain allows the 2514DZ to accept a single-ended input as low as 500 mVpp from the MUX while delivering a large output voltage of 8Vpp differential.


MUX/DEMUX
The MUX function is to multiplex 16 lanes of electrical bit streams into two lanes of 20G electrical bit streams. The MUX also includes a pre-coder, on-chip VCOs, clock multipliers, and de-skew functions. On the receive side, the DEMUX de-serializes two lanes of 20G electrical bit streams back to 16 lanes of lower speed data. Key challenges for the MUX/DEMUX are jitter performance, power consumption, and packaging. Figure 4 shows a photo of a Sierra-Monolithics 40G DQPSK MUX in a BGA package with GPPO connectors. GPPO connectors are currently required for the high speed connection between the MUX, modulator drivers, and modulators.


Demodulators and Receivers
The 40G DQPSK signal contains information regarding the phase difference of two successive bits. A 40G DQPSK demodulator function is to convert the phase difference information back to intensity. Figure 5 shows a demodulator by Optoplex.


Because the information is contained by the difference of the two optical bits, balanced receivers are used after the. A balanced receiver amplifies the differential input into the receiver. Thus if the two optical bits are in phase, the phase difference between them is small and the balanced receiver will convert the phase information into a "0." If the two optical bits are out of phase by "π/2," the phase difference between them is large, and the balanced receiver will convert the phase difference into a "1." As shown in the block diagram in Figure 1, two balanced receivers are needed per system. U2t Photonics, Picometrix, and Yokogawa are the current top 40G receiver vendors. Figure 6 shows a photo of a balanced receiver from U2t Photonics and Figure 7 shows a photo of a balanced receiver from Picometrix.


Figure 6. 40G DQPSK Balanced Receiver. Courtesy of U2t

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