Design Article

Power Supply Ripple Rejection and Linear Regulators: What's all the noise about?

Gabriel A. Rincón-Mora, Senior Member, IEEE, and Vishal Gupta, Student Member, IEEE, Georgia Tech Analog and Power IC Design Lab

9/20/2005 1:11 PM EDT

‘Peace and quiet’ is a scarce commodity in our lives, and with the relentless demand for highly integrated, low cost mixed-signal system-on-chip (SoC) solutions [1], it is even less frequent in integrated circuits (ICs). Densely populated SoC environments are plagued with broad-spectrum noise generated from low and high frequency digital, radio frequency (RF), and switching power supply circuits, reaching hundreds of milli-volts and extending from several thousand to a few giga-Hertz [3]. As power supplies drive these rapidly changing loads, noise is created in the supply busses and therefore propagated throughout the chip. It creates jitter and generally deteriorates the dynamic range and spectral fidelity of sensitive analog functions like data converters, phase-locked loops (PLLs), voltage-controlled oscillators (VCOs), and the like [3-6], which is how and why linear regulators have come to amass so much demand.

Linear regulators, among other things, are tasked with shielding sensitive analog blocks from noise in the supplies, making wide-spectrum power supply ripple rejection (PSRR) a vital specification parameter. In broad terms, the function of the regulator is to generate an independent supply voltage through a series-shunt feedback network. Figure 1 illustrates the basic architecture of a low dropout (LDO) linear regulator whose added function is to sustain low input-output voltage differentials, which is critical, for instance, in low voltage, battery-supplied applications. Shunt feedback is accomplished by sensing the output voltage through the R1-R2 feedback network, comparing it against a stable voltage reference, and generating a corresponding error-control signal to a pass device via an error amplifier. In essence, the feedback control signal will do whatever it takes to ensure the output voltage is close to the reference, and how close is determined by the loop gain (Aolβ) of the circuit.

LDO block diagram
Figure 1. Block diagram of a typical low dropout (LDO) linear regulator

Catching the wave of integration and the demand for point-of-load (POL) regulation, many load-specific LDOs are now being deployed on-chip with output currents in the range of 10 to 50 mA [7-9]. Many of these LDO circuits, unfortunately, do not enjoy the luxury of off-chip capacitors because of the pin- and board-limited nature of the densely integrated systems they serve. Historically, however, designers have relied on these large external passives to shunt away output noise. Today, IC designers are confronted with more noise and less capacitance with which to fight it, with on-chip capacitors ranging only up to 200 pF.





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