Unscrambling the power losses in switching boost converters

A Typical Boost Converter
A DC-DC boosting function is basically realized by first energizing an inductor in one cycle and releasing the stored energy to the output in the other, as realized by the circuit shown in Figure 1a when switch MN is engaged (MP and D are off) and inductor L is energized (connected from input supply V_IN to ground) and later when switches MP and D are on (MN is off) and the energy stored in L is released to the load and output capacitor in the form of a current. Since the average voltage across the inductor in steady state is zero, the average voltage at the switching phase node V_PH is equal to V_IN and its peak voltage (V_PK) is therefore higher than V_IN, the latter of which is impressed across output capacitor C via peak detector switch combination MP-D (VOUT ≈ V_PK). The on time of the circuit is defined as the time interval for which MN conducts and inductor current rises, as shown in Figure 1b, and off time alludes to the time when MP-D conduct a decreasing inductor current. Broadly, three basic mechanisms incur power losses in the boost switching converter: conduction losses resulting from switch-on and series parasitic resistances (I²R), switching losses resulting from current-voltage overlapping events across the switching transistors (when switching node V_PH is neither at ground nor V_OUT), and gate-drive losses, which amount to the energy required to charge and discharge the gate capacitances of the switching transistors.

Figure 1a Simplified circuit schematic

Figure 1b Switching waveforms of a switching boost converter