This paper will discuss the technical motivation behind compensation, derivation of analytical and design oriented transfer functions, establish criteria for the selection of a particular type of network, and provide an illustrative example. In Part 2 you will find a series of 'quick sheets' and appendices that are a useful reference in the design of compensation networks.

Motivation
Due to the abundance of materials related to elementary feedback theory, this paper will assume the reader has prior knowledge of properties including the gain-bandwidth product and the reduction of noise (or other disturbances) due to feedback. We will simply say that the purpose of compensation (feedback) is to alter the closed loop response of a system to meet a given set of requirements.

The requirements of a closed loop system may be classified as rise time, overshoot, and settling time as shown in Figure 1.

Figure 1: Time domain characteristics

These time domain characteristics are related to each other and the frequency domain characteristics of the system. Design usually takes place in the frequency domain since the specifications are more convenient and it gives the simplest criteria with which to work.

Design Criteria
Since the motivation for compensation is to alter the system performance, we will need a model for our particular system. A simplified switcher model is shown in Figure 2a.

Figure 2a: Switcher Model

One should note that the components inside the dashed box are integrated within a switcher. In some cases the FETs will be used externally. This is, however, of no consequence in the treatment of loop response.

While the model shown in Figure 2a is useful for understanding the function of the control loop, this model may be simplified to aid in our analysis.

The comparator and FETs may be lumped into one circuit element, a voltage controlled voltage source (VCVS) of gain A V/V. This circuit element is typically referred to as the modulator. The modulator gain is either PV_IN/V_RAMP or a given (constant) value for feedforward topologies.

Figure 2b: Linear, small signal switcher model

While there are a number of tradeoffs and interrelationships relating the loop gain to the closed loop performance, a phase margin of 45°-90° and crossover frequency of 1/5^th-1/10^th the switching frequency should provide good performance, it is typically advisable to have a phase margin of 52° and a crossover frequency of 1/5^th the switching frequency.

These requirements may be met by analyzing each component in the system as shown in the following section. Subsystem analysis
Subsystem analysis
The system we have presented thus far is composed of several subsystems as shown in Figure 2b. For simplicity we will limit our treatment of subsystems to the output filter and compensation network.

Output Filter
The selection a compensation network depends on the open loop properties of our system. The open loop properties of the switcher are found by analyzing the output network. Nodal analysis of the output network yields the following analytical transfer function and diagram (Figure 3):

Where:

A₁ = R_{Load A2 = ResrC
A3 = LResrC + LCRLoad
A4 = RLoadResrC + L}

Figure 3: Output filter

Figure 4 gives an approximation and intuitive understanding of the algebraic equations

Figure 4: Straight-line output filter amplitude approximation

An approach that gives a more intuitive understanding is algebra on the graph (approximation). If we assume R_LOADo=√L/C, the response may be plotted as shown in Figure 4.

A design oriented transfer function may be expressed as:

Where:

The phase characteristics of the output network are greatly influenced by circuit Q_o. For high Q_o circuits (Q_o ≥ 0.5), we make the following approximation:

For low Q_o circuits (Q_o < 0.5), we make the following approximation:

Figure 5: Output filter phase approximation

Note that while the system Q is typically between 0.25 and 2, the output filter Q (Q_o.) can vary over a wider range. As we will see this should not be cause for alarm.

There are two types of compensation networks, Z₁ and Z₂ (Figure 2b) that are typically used. These networks are referred to as type 2 and type 3 compensation for reasons that will become obvious later. Type 2 compensation
Type 2 Compensation
A type 2 compensation network may be modeled as shown in Figure 6.

Figure 6: Type 2 compensation network

Nodal analysis of the type 2 compensation network yields the following analytical transfer function:

Where:

A₁ = R₃C₂
A₂ = R₂₃ C₂₃
A₃ = R₂( C₂ + C₃

Using algebra on the graph, we make the following assumptions:

R₂ << R₃
C₃ << C₂
. The response may be plotted as shown in Figure 7.

Figure 7: Type 2 compensation straight-line amplitude approximation

A design oriented transfer function may be expressed as:

Where:

Figure 8:Type 2 compensation network Bode phase plot

It can be seen that this network extends the bandwidth without increasing the loop phase (Type 2 compensation gets its name from the fact that the Bode magnitude plot has two diagonal slopes.) Therefore this compensation scheme may be used if the phase margin of the open loop system is greater than the desired closed loop phase margin at the desired crossover frequency.

Components for this compensation scheme may be selected according to the following guideline:

ω₁=ω₀, ω₂=6.28-f_SW/2
Where f_SW is the switching frequency.

Using this approach, one must start with an initial value for R₂ and midband gain (V/V gain between zeros ω₁ and ω₂.) to calculate the remaining component values. The remaining component values may be calculated as:
R₃ = kR₂

In some cases one will also find that the relative magnitudes of R₂ and R₃ do not hold. This is not a problem. Relative magnitudes must be assigned to components in the circuit in order to obtain the design oriented transfer function. One will find however, that these do not affect the shape of the response; they affect the overall 'height' or 'gain level' of the response. Simply put, for a compensator midband gain (k) greater than one, R₂<3, and for a compensator midband gain (k) less than one, R₂>>R₃. Otherwise the system poles and zeros will be where they are placed.

Type 3 compensation
Type 3 Compensation

A type 3 compensation network may be modeled as shown in Figure 9.

Figure 9: Type 3 compensation network

Nodal analysis of the type 3 network, shown in Figure 9 yields the following analytical transfer function:

Where:

A₁ = R₃C₂
A₂ = C₁(R₁ + R₂)
A₃ = R₂R₃ C₂₃
A₄ = R₂(C₂ + C₃)
A₅ = R₁C₁

Using algebra on the graph, we make the following assumptions:

R₁ << R₂ << R₃
C₃ << C₁ << C₄

the response may be plotted as shown in Figure 10.

Figure 10: Type 3 compensation algebra on the graph

A design oriented transfer function may be expressed as:

Where:

It can be seen that this network extends the bandwidth and increases the loop phase (Type 3 compensation gets its name from the fact that the Bode magnitude plot has three diagonal slopes.) Therefore this compensation scheme may be used if the phase margin of the open loop system is less than the desired closed loop phase margin at the desired crossover frequency.

Figure 11: Type 3 compensation Bode phase plot

Components for this compensation scheme may be selected according to the following guideline:

ω₃ = ω_esr, ω₄ = 6.28-f_SW/2, &omega₁ = ω₂ = ω₀

Using this approach, one must start with an initial value for R2 and midband gain (V/V gain between zeros &omega₁ and ω₂.) to calculate the remaining component values. The remaining component values may be calculated as:

If you blindly applies the guidelines outlined above, you will find that in some cases ω₄ < ω₃ (the zero caused by the output capacitor ESR is higher than half the switching frequency). This typically occurs when using low ESR ceramic output capacitors. While the component values will be slightly different, the relative component values will hold (R₁<2<3 , C₄<1<3) and the compensator response will be the same.

In some cases you will also find that the relative magnitudes of R₂ and R₃ do not hold. This is not a problem. Relative magnitudes must be assigned to components in the circuit in order to obtain the design oriented transfer function. You will find however, that these do not affect the shape of the response; they affect the overall 'height' or 'gain level' of the response. Simply put, for a compensator midband gain (k) greater than one, R₂<3, and for a compensator midband gain (k) less than one, R₂>>R₃. Otherwise the system poles and zeros will be where they are placed. Procedures and examples
Procedure
To compensate a switcher, the following steps may be used as a general guide:

• Determine characteristics of the output filter
  
• Choose a compensation network
  
• Calculate values for components in the compensation network
  
• Simulate
  

These steps should be iterated until a suitable solution is reached.

In the process outlined above there are several things to keep in mind. If a suitable solution is not reached after the initial iteration, you may resort to plotting the design oriented transfer function on a Bode phase plot. The poles and zeros should be placed to attain the necessary phase margin (typically 45°-90°, however 52° is preferable) at the desired ω_crossover (typically 1/5^th"1/10^th the switching frequency, however 1/5^th the switching frequency is preferable). Once this is completed, a Bode amplitude plot may be constructed. The Bode amplitude plot may be used to determine the system gain necessary to reach 0dB at ω_crossover.

Example
Consider a switcher with the following requirements:

• f_SW = 300kHz
• V_IN = 5V
• V_OUT = 2.5V
• V_RIPPLE ≤ 1%
• V_DROOP ≤ 2%
• I_OUT = 5A
• I_RIPPLE ≤ 40%
• Modulator gain (A) = V_IN/V_RAMP = 10V/V

Desired Loop Response:

• Loop bandwidth = 60kHz
• Loop phase margin = 52°

• L = 2.2μH
  
• C = 100μF
  
• R_esr ≈ 6mΩ
  

Substituting these values into the analytical model in the Output Filter section of this document, we obtain the plots shown in Figure 12.

Figure 12: Output filter Bode plots

From Figure 12 we see that at 60kHz (377k Rad/s), the phase margin is less than 52°. Therefore we must pursue type 3 compensation (type 3 compensation is capable of increasing the phase and extending the bandwidth of a given response).

Figure 13: Small signal model of switcher with type 3 compensation

Applying the design guidelines for type 3 compensation:

• ω₃ =ω_esr =1.67 MRad/s
• ω₄=6.28-f_SW/2=942 kRad/s
• ω₁=ω₂=ω₀=67.4 kRad/s

If we start with initial values for R₂ and the midband gain.

• R₂= 43.2kΩ
  
• Midband gain =15 dB
  

The remaining components are calculated as:

The closest standard values are:

• R₁ = 3.09kΩ
  
• R₃ = 24.3kΩ
  
• C₁ = 330pF
  
• C₂ = 560pF
  
• C₃ = 22pF
  

Figure 14: Type 3 compensation Bode plots

The loop gain may be plotted as shown in Figure 15.

Figure 15: Loop gain Bode plots

The loop unity gain bandwidth is calculated as 59.3kHz with a phase margin of 53.4°. This is certainly close enough to our requirements to verify in a physical implementation (physical realization of a circuit can easily vary by 10%-20%).

Now, assume the requirements change. The loop bandwidth is now specified as 30kHz with a phase margin of 60°. Plotting the design oriented transfer functions we see that in order to increase the phase margin we will need to change the location of the zeros &omeg;₁ and ω₂. While it may be feasible to change only one of the zero locations, moving both together simplifies the process.

If we place a marker where the phase of the compensator should be to achieve the new phase margin, all that remains is to decrease the value of ω₁ and ω₂ such that the compensator phase intersects this point.

Figure 16: Compensator algebra on the graph

From the graph we see that the new values for ω₁ and ω₂ are 10^4.6 rad/s. Now one must plot the magnitude for the system to determine the new midband gain (Figure 17).

Figure 17: Straight line approximation of the Bode magnitude plot

The midband gain that should be used for our calculations is based on the uncorrected system response. This is because we are working backwards from the system response, which is comprised of the response from two subsystems, to the response of one of the subsystems (compensator). From Figure 17 we see that the uncorrected compensator midband gain, k, is approximately 10.25dB. Since both ω₁ and ω₂ are placed at the same frequency, we must apply a 6dB correction factor. Therefore the compensator midband gain is approximately 4.2dB.

Recalculating the component values,

The closest standard values are:

R₁ = 2.26kΩ
R₃ = 6.98kΩ
C₁ = 470pF
C₂ = 3.3nF
C₃ = 82pF

Substituting these values into the analytical model for the system, we obtain the plots shown in Figure 18.

Figure 18: Loop gain Bode plots

From this we see that the loop bandwidth is now 28.8kHz with a phase margin is 59.7°. This is certainly close enough to our requirements to verify in a physical implementation.

To summarize, the roots of our transfer function should be placed to achieve the desired phase margin at a particular frequency (ω_CROSSOVER). Once this is done, the gain should be adjusted to crossover at this frequency.

Look for the practical considerations for the physical implementation, size of caps, selection of resistor values and much more in Part 2

About the author
Joel Steenis holds degrees in Electrical Engineering and Applied Mathematics from the University of Arizona in Tucson. He has been working as an applications engineer with National Semiconductors' power management group for the past two years and is currently pursuing a masters degree in electrical engineering at the University of Southern California.