How the Simple Serial Transport manages noise and timing

Deploying a new system bus always entails some risk, particularly from narrower component offerings, but improved system performance, system stability, computer performance, software design and future scalability pay the dividends the designer seeks. Sufficient backing of the Simple Serial Transport by system and component vendors looks promising after a short enabling period that began in 2005.

The Simple Serial Transport ensures predictability where each bit maintains guaranteed timing. Such a guarantee is not to be dismissed or passed over quickly. The nature of bus stretching is unsettling in itself. However, examples of predictable self-clocked data are common. Manchester-encoded data represents one general type of predictable clock-embedded timing. Figure 1 shows a common type of Manchester-encoded data. The clock is extracted, usually with the help of a digital phase-locked loop.

Figure 1. Manchester-encoded logic 1 and logic 0 bit stream (cit. IEEE 802.4 Standard, 1997)