Design Article

IMG1

Reliability of IEC 61000-4-2 ESD testing on components

Robert Ashton, ON Semiconductor

8/10/2008 7:30 PM EDT

Testing for immunity to electrostatic discharge (ESD), from cell phones to computers, is usually done with the IEC 61000-4-2 standard.1 But IEC61000-4-2 is purely a systems-level test spec, not a spec for individual components. Components manufacturers are thus forced to define test plans without the guidance of a standard, and test results coming from different component manufacturers may differ considerably. So what does components testing to this standard mean? Here are the main issues to consider, particularly with respect to contact-discharge versus air-discharge results.

Contact-discharge testing
There are four recommended stress levels for contact discharge (conducting surfaces) and air discharge (insulating surfaces). Many systems are specified to pass at the highest defined levels in the standard (8 kV for contact discharge, and 15 kV for air discharge). In contact-discharge testing,2 the ESD gun is charged, the tip of the gun is placed against the object to be stressed and a relay inside the gun is closed, initiating the stress. IEC 61000-4-2 specifies a waveform for contact-level testing (Figure 1). The current waveform is characterized by an initial current spike with a rise time of 0.7 to 1.0 ns and specified currents at 30 ns and 60 ns. The current levels scale linearly with voltage from 2000 to 8000 volts. At 8000 volts, the peak current is 30 amps and the 30-ns and 60-ns current levels are 53, and 27 percent, of the peak current, respectively. Those familiar with component-level ESD testing will likely assume that contact discharge testing according to IEC 61000-4-2 is done similar to Human Body Model testing. The specified waveform is forced into one device pin, while one or more other pins are held at ground, which is the assumption made by manufacturers such as ON Semiconductor. The test that ON Semiconductor applies on its devices is to stress each pin 10 times positive and 10 times negative at each voltage.

(Click on Image to Enlarge)

Figure 1: IEC 61000-4-2 contact waveform

In any case, when evaluating contact-discharge data for components, you need to know which pins have been stressed, which pins have been grounded during the stress, how the ground connection was made to the component being tested, and the number and polarities of the stresses to the component.

Air-discharge testing
In air-discharge testing, the relay in the ESD gun that initiates contact discharge remains closed throughout the test. The capacitance in the ESD gun and the tip of the ESD gun are charged simultaneously. The tip of the ESD gun is then moved toward the intended stress point until an arc forms or the gun's tip touches the system being stressed. Air-discharge testing is more challenging to adopt for component testing. Some people assume, based on Table 1, that a 15-kV air-discharge is equivalent to contact discharge testing at 8 kV. However, it is not valid to assume that a component that passes Level 4 contact-discharge tests also passes Level 4 air-discharge tests.

(Click on Image to Enlarge)

All device-level ESD standards specify current waveforms for specific voltage stress levels and thus the standard tends to ensure some level of test reproducibility. The IEC standard does not, however, specify waveforms for air discharge. The air-discharge waveforms depend on both the voltage and the geometry of the target. The IEC standard specifies a current-sensing target for verifying contact-discharge waveform parameters. The target is mounted at the center of a ground plane and has a characteristic impedance of 2 ohms (to ground). When connected to an oscilloscope with an input impedance of 50 ohms, the target produces 1 volt for each ampere of current. The discharge point is a metal disk measuring 26 mm in diameter.

Figures 2 and 3 display contact-discharge and air-discharge waveforms directly to the IEC target at 2, 8, and 16 kV. At 2 and 8 kV, the contact- and air-discharge waveforms are very similar, but at 16 kV the initial current spike is absent from the air-discharge waveform. For air discharge at high voltage, a very long arc forms between the gun and the target. The long arc has higher resistance and inductance than direct contact and greatly reduces the initial current spike. The nature of this arc depends on the geometry in the region of the arc.

(Click on Image to Enlarge)

Figure 2: Contact discharge to IEC 61000-4-2 target


(Click on Image to Enlarge)

Figure 3: Air discharge to IEC 61000-4-2 target


The gun tip used for air discharge is a rounded tip and the IEC specified target has a flat surface. Electric fields are geometry dependent. Pointed tips increase the local electric field and initiate electrical breakdown earlier than flat or blunt geometries. Electrical components in state of the art packages have very small contacts, very different from the flat surface of the IEC target. Modifications to the discharge surface of the IEC target have allowed study of geometry effects.

The center disk of the IEC target can be removed where it screws into the main body with a 3-mm threaded rod. A series of alternative target centers were made to study the voltage properties before an HBM event.3 These targets are ideal for understanding how current waveforms depend on geometry. Electrically the targets consist of zener diodes (breakdown is 10 volts) with the anodes connected to the IEC target and the cathodes connected to various geometry pins to simulate different integrated circuit packages. The diodes simulate the ESD protection circuit of an IC or ESD protection component. Contact-discharge and air-discharge measurements were made on a variety of pin geometries. A flat surface geometry produced very similar results as those shown in Figs. 2 and 3, although the zener had been added to the current path.

Figures 4 and 5 show the results for a pin that's 0.4-mm in diameter (similar is size to a modern BGA solder ball). The contact-discharge measurements still look very similar to those for a contact discharge directly to the IEC target as shown in Fig. 2. For air discharge to the small pin, the suppression of the initial current spike begins at a much lower voltage. That's because the electric field around the small pin is enhanced, and the result is an electrical arc that is longer and therefore has higher resistance and inductance than for a flat surface.

(Click on Image to Enlarge)

Figure 4: Contact discharge to a small diameter pin

(Click on Image to Enlarge)

Figure 5: Air discharge to small diameter pin

These measurements show there is no simple correlation between the stress level in air-discharge and contact-discharge conditions. The current waveform for contact discharge scales linearly with voltage, while air-discharge waveform shapes depend on the voltage level and the local geometry where the discharge occurs. For discharge to a flat surface at low voltages, air-discharge and contact-discharge currents are very similar.

At higher voltage, as the arc length for air discharge increases, the initial current peak diminishes and disappears while the rise time increases. For discharge to small geometries, such as pins on modern integrated circuit packages, the deviation between contact discharge and air discharge occurs at lower voltages. The deviation between contact and air discharge is not, however, so great as to make 8-kV Level 4 contact discharge equivalent to 15 kV Level 4 air discharge as shown in Fig. 6 for discharges to a 0.4-mm pin. Even though the peak currents for the two discharges are very similar, the total energy delivered by the 15-kV air discharge is considerably higher than from the 8-kV contact discharge.

(Click on Image to Enlarge)

Figure 6: Contact discharge at 8 kV, and air discharge at 15 kV, to a 0.4-mm pin

Air-discharge testing is also affected by all of the features that change the properties of an arc, including humidity, atmospheric pressure, and the speed of approach. In the measurements presented here, several air-discharge pulses were taken at each voltage and a specific pulse was chosen that was considered representative for that voltage and geometry.

Manufacturers such as ON Semiconductor specify air-discharge ratings very conservatively. In many cases an air-discharge rating of Level 4, 15 kV, is specified based on a device's ability to pass contact discharge at a voltage level in excess of 15 kV. This approach is valid because in all cases contact discharge is a more severe stress than air discharge at the same voltage. For air-discharge testing on a component, the component is generally mounted on a board in which the pins under test are connected by short traces to flat pads to which the air discharge is applied. As shown above, air discharge to a flat surface gives a more severe stress than to a small pin. As in contact discharge, 10 stresses are performed with both positive and negative polarity. The test for contact-discharge stress can provide reproducible results, but only if the same pin combinations are used.

As mentioned previously, the standard gives no guidance for pin combinations because it is not intended for component-level testing. Test results for air discharge are more problematic because the nature of the stress is very sensitive to the geometry where the discharge occurs. In addition, a rating based on a contact-discharge Level of 1 to 4 will not usually be equal to the corresponding air-discharge level. An air-discharge rating based on the ability to survive an equal or greater voltage contact-discharge stress is a conservative and justifiable assumption.

In summary
There's a great deal of ambiguity in ESD testing for components using IEC 61000-4-2. What's needed is a standardized test method. The Electrostatics Discharge Association's (ESDA) Working Group 5.6 is currently working on such a standard. Until such time that it becomes available the results for components tested according to IEC 61000-4-2 may be difficult to reproduce, especially for air-discharge testing, and the significance of test results needs to be interpreted with care.

References
1. "IEC 61000 Electromagnetic compatibility (EMC) Part 4-2: Testing and measurement techniques—Electrostatic discharge immunity test Basic EMC Publication" January 23, 1998.
2. R.A. Ashton, "System Level ESD Testing: The Test Setup," Conformity, December 2007, pg 34.
3. R.A. Ashton and E. Worley, "Pre Pulse Voltage in the Human Body Model," 2006 EOS/ESD Symposium, Tucson, AZ September 2006.

About the author
Robert Ashton joined ON Semiconductor in 2007 in the Discrete Products Division as a Senior Protection and Compliance Specialist after three years as Director of Technology at White Mountain Labs, a provider of ESD and latch-up testing of integrated circuits. Before that he was a Distinguished Member of Technical Staff at Agere Systems, Bell Labs Lucent Technology, and AT&T Bell Labs, where he specialized in integrated circuit technology development. Robert is an active member of ESDA Working Group 5 for Device Standards, ESDA Working Group 14 for System Level Test as well as the JEDEC Committee 14.1 ESD and Latch-Up Working Groups. He earned his B.S. and Ph.D. in Physics from the University of Rhode Island.


print

email

rss

Bookmark and Share

Joinpost comment




Please sign in to post comment

Navigate to related information

Product Parts Search

Enter part number or keyword
PartsSearch

FeedbackForm