All input power sources have defined limits, whether it's current, voltage or power. Batteries droop in voltage when loaded heavily, indirectly setting the maximum output current to maintain voltage regulation at the load. Nearly all power adapters or "black boxes" are designed to a maximum output power level, thereby setting the maximum input power. Beyond this level and the power adapter may go into over-current protection mode, or even blow a fuse to protect the input source. The versatile universal serial bus (USB) is a 5V source with an output current of only 0.1A, but when requested can supply a maximum current of 0.5A. That current limits this extremely popular power source to just 2.5W. Additional output power can come only from drawing upon a source of stored energy, such as a capacitor or a battery.

Providing current to the load from a charged capacitor is a matter of providing the correct amount of charge over a defined period of time. Viewed in terms of delivered power, this is defined by Equation 1 where V_i is the capacitor's initial voltage, and V_f is the final, discharged voltage.

Equation 1

Know Your Load
This concept is simple to implement: just charge a bulk capacitance to an initial high voltage, and allow it to discharge to a pre-defined level as current is being delivered to the load during the temporary overload condition. At the end of the load "pulse," the capacitor will be depleted to V_f and will need to be recharged to V_i before the next discharge cycle. The amount of power the bulk capacitance must support is equal to the power delivered to the load, minus that supplied by the input source during discharge. The efficiencies of all switching converters should be considered so as to not under-estimate the bulk capacitance required. Equation 1 is an expression for the capacitor voltage while delivering a constant power to the load. However, this is a worst case situation as not all loads demand constant power!

An example of a constant power load is the input to a regulated switching power supply. As the switching power supply's input voltage decreases, the input current must increase to maintain a constant power. Loads may also look resistive or appear as a constant current source. Figure 1 shows the discharge characteristics of three different load types. Each load is set to pull the same amount of power at the initial start point, but beyond that each diverges. The constant resistance load current is opposite that of the constant power load and decreases as its voltage decreases, exponentially flattening out as it discharges. The constant current load discharges linearly to zero volts while supplying the same current, regardless of the capacitor's voltage. The constant power load discharges the quickest due to the rapidly increasing discharge current as the voltage decreases. A point of diminishing returns is evidenced when this load type is allowed to discharge to very low voltages because there is little energy capacity remaining. Depending on the load type, the required capacitance can vary significantly. Therefore, it is beneficial to "know your load."

Figure 1: Load type determines capacitor discharge characteristic.
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When deciding to use a capacitor bank, the designer must decide how much discharging to allow. There are two possible ways to do this. The first is to directly connect the load to the capacitor bank. The voltage swing on the capacitors must be within the allowable operating limits of the load. Typical semiconductor loads can only tolerate a 3 or 5% range around their set voltage. This severely reduces the allowable droop voltage and forces the bulk capacitance to be quite large. The benefit is that no additional post regulation of the capacitors voltage is required.

The second method is to allow a large swing in voltage, and use a post regulator between the capacitor and the load. The post regulator may be a buck, boost or even a sepic converter, depending on the input, output, and capacitor voltage swing. A large swing on the capacitor better utilizes the stored energy, minimizing the amount of capacitance required. The decreased capacitance requirement may result in an overall cost savings, even when factoring in the additional cost of the post regulator.

Some super caps not so super
Super capacitors benefit from an energy density that is on the order of 1000X that of aluminum electrolytics. It is not uncommon today to find super capacitors rated for 100F or larger. Many of these capacitors are designed for low-current drain applications such as memory backup. The "button cell" capacitors often have an equivalent series resistance (ESR) of 100Ohms or higher. The designer must determine the maximum ESR allowed based on the discharge current and voltage droop. An ESR that is too large and can create a voltage drop that could instantly collapse the output voltage. Newer types of super capacitors have very low ESR values that begin to rival those of ceramic capacitors.

Figure 2: Converter charges super cap bank to supply large load demand.
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In the example circuit shown in Figure 2, low ESR super capacitors were selected since they need to source hundreds of milliamps. The circuit in Figure 2 receives input power from a USB port with a 2.5W input power limit. The converter's output voltage is 7V at a pulsed load of 4.2W for four seconds, followed by 0.7W for 15 seconds. An isolated flyback converter using the TPS40210 controller was used to charge the super capacitor bank to 13.5V when lightly loaded. The capacitor was allowed to droop down to about 9.5V after four seconds of heavy loading. During this period, the input current is regulated to a maximum of 0.5A (2.5W) sensed by a current sense resistor with operational amplifier (op amp) level scaling. When the input current tries to exceed 0.5A, this "current loop" takes control from regulating the secondary side voltage. During input current regulation, input power is still being delivered to the secondary, but limited to a 2.5W level with the capacitor bank supplying the surplus to the load.

Figure 3 shows several key circuit waveforms while in operation. During a load current pulse of 0.6A (bottom trace), the super capacitor voltage (top trace) droops nearly 4V. This voltage is the input power source to a TPS62110 dc/dc synchronous buck converter regulating the output to 7V (middle trace). When the 7V output load is reduced to 0.1A, the capacitor bank recharges to the full 13.5V. During these load steps and wide input voltage swings, the output voltage remains steady with little disturbance.

Figure 3: Load pulses (bottom trace) droop the cap bank (top trace) but the output voltage holds steady (middle trace) (2V/div, 0.2A/div, 5s/div).
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Figure 4 shows startup waveforms with an application of 4.5V at the USB input. At turn-on, the capacitor bank is initially discharged and the flyback converter immediately transitions to input current limiting mode since the output loads appears similar to a short. The capacitor bank slowly charges to 13.5V, with the rate determined by the 2.5W input power limit and losses associated with the flyback's efficiency. Once it reaches 13.5V, the secondary voltage loop takes over, now allowing the input current to decrease. In this example, no output loading was present, yet it took nearly 18 seconds to fully charge the capacitors. An even longer startup time would have resulted if external loading was applied during startup. This is one of the drawbacks of having a large storage capacitor.

Summary
The circuit presented in this article provides a method to deliver isolated power to a load that is greater than what is available on the input source. Storing energy in a bulk capacitor has drawbacks, such as the high cost of super capacitors and long startup times. The load type itself has a direct impact on the amount of capacitance needed for long holdup durations. A constant power load, such as a regulated switching power converter, presents the most severe load type and can discharge a stored capacitor quicker than a resistive or constant current load. However, even the power demands of a constant power load still can be accommodated by allowing a large voltage droop on a holdup capacitor followed by a switching regulator.

Figure 4: Charging the cap bank at startup may be slow (2V/div, 5s/div).
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About the Author

John Betten is an Applications Engineer and Senior Member of Group Technical Staff at Texas Instruments, and has more than 23 years of AC/DC and DC/DC power conversion design experience. John received his BSEE from the University of Pittsburgh and is a member of IEEE.