Design Article

Enable low power design with FPGAs

Wendy Lockhart, Principal Engineer Actel Corp.

10/28/2009 12:01 PM EDT

The last decade has seen rapid and permanent change in technology markets towards smaller, more portable systems. Many large systems that once sat on a desktop are now portable, while portable devices that used to fit in a backpack or briefcase must now fit in a shirt pocket. This has brought many additional design demands, most obviously battery life. Time between recharging - once measured in hours " must now stretch for days.

Size and power considerations are now often the top priority in many system designs, but portability and long-lasting power can become conflicting design requirements. Design teams are continually challenged with packing more and more functionality into smaller and smaller packages, and then somehow squeezing enough power into the same package to keep everything running for days, weeks or even months at a time on a single battery charge.

Meeting size and power requirements in portable devices typically requires ASICs. Increased market pressures comprising shortened development cycles and lower cost, however, make the time and expense required for ASIC development a high design risk. Taking time to design and debug an ASIC could lead to missing ever shrinking market windows or drive development costs very high that making a profit is impossible.

FPGA to the rescue

So what does a design team do? FPGAs are the answer. In many applications, FPGA functionality rivals and often surpasses that of an ASIC. But beware: Not all FPGAs are created equal, especially in portable, low-power applications.

While a detailed description of an FPGA is beyond the scope of this article, a simple explanation will serve our purposes. If you opened the cover of an FPGA, you would find multiple programmable logic blocks and a network of customizable interconnects.

Design teams program the device by connecting logic blocks via transistors in the interconnections to create custom functions. In an ASIC, the function performed by the transistors is achieved using fixed, metal interconnections, defined at the time of fabrication.

FPGAs offer design teams two key benefits: design flexibility and fast time-to-market. Using FPGAs, designers can create and test multiple design options in the time required for a single spin of an ASIC design. The result is a better design in a shorter time.

With these important benefits, you might wonder why FPGAs aren't used in more designs. The answer lies in process technology. FPGAs have traditionally been fabricated using SRAM technology, which results in a device with a large circuit board footprint and high power draw. These drawbacks limit an FPGA's utility in portable applications. FPGAs based on flash technology overcome these drawbacks and make programmable logic an ideal solution for portable devices.





Byron196

11/5/2009 10:51 AM EST

Wendy,
I believe I understand the intent of your statement:
Taking time to design and debug an ASIC could lead to missing ever shrinking market windows or drive development costs very high that making a profit is impossible.
However, the word "so" could have been included " so that making a profit is impossible". Overall I learned from your article.

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alalonso

11/6/2009 3:59 PM EST

When it comes to power, not all SRAM based FPGAs are created equal. New generation of these devices built on 65 nm technology and designed for portable applications have standby power in the single digit uA range and total power in the single digit mA range. Any power dissipation comparison needs to be viewed in terms of comparable parameters including logic resources, clock rates, temp, etc. Simply Stating SRAM based FPGAs can draw up to 1000x more static power than FLASH based FPGAs is irrelevant absent specifics of an exhaustive comparison of available solutions.

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