Power supply designers are looking for semiconductor solutions that offer ease of design, a host of protection features and enable power supplies to meet increasingly stringent energy-efficiency specifications. This article will explore a highly integrated semiconductor solution for power supplies that consists of boost PFC and dual-forward PWM with very few external components to achieve versatile protections /compensation and meets IEC-1000-3-2 specifications.

The FAN480x is composed of average current mode control of Power Factor Correction (PFC) and Pulse-Width Modulation (PWM). Switching charge multiplier technology for the PFC stage could provide higher Power Factor (PF) and lower Total Harmonic Distortion (THD) for the power supply, which the PWM stage can use for current mode control or voltage mode control. The PFC and PWM gate output uses different modulation control to reduce output voltage ripple on the PFC output capacitor with Leading-Edge Modulation control on PFC stage and Trailing-Edge Modulation on PWM stage. FAN480x also provides programmable Two-Level PFC output voltage for improved efficiency at light load and low-line.

Basic Circuit Diagram of Dual-Forward Converter Using PFC/PWM Combo Solution Click on image to enlarge.

FAN480x has several protect functions, e.g. PFC and PWM Soft-Start, Over Voltage Protection / Under Voltage Protection, Cycle-by-Cycle Current Limit, and PFC Brownout Protection, etc. Figure 1 shows a 300W FAN480x ATX application circuit with 10W standby power supply and the PFC section provides 380VDC to a dual-transistor voltage-mode forward converter. The circuit operates from 75VAC to 264VAC with both power sections switching at 65 kHz.

While FAN480x PFC is working in continuous conduction mode, it could help to reduce current variation from the boost inductor and for large wattage applications. The gain modulator could provide higher Power Factor and lower Total Harmonic Distortion for power supply and is the key for PFC stage as a circuit block response to the current loop for line voltage, frequency, RMS line voltage and PFC output voltage as shown in equation (1). The function of gain modulator is to generate a control signal for PFC stage duty cycle and maintain output voltage. The divider Vrms² could provide a constant power at high line and low line condition. The figures below shows FAN480x gain modulator working principle and application circuitry.

Gain Modulator Working Principle and FAN480x Gain Modulator Application Circuitry Click on image to enlarge.

Current-Loop Compensation

The FAN480x employs two control loops for power factor correction: a current control loop and a voltage control loop. The current control loop shapes current based on the reference signal from the IAC Pin 2. The voltage loop stabilizes output voltage and defines THD balance. The figure below shows a simplified block diagram of the current control loop. The PWM block is comprised of a comparator, flip-flop and output MOSFET driver. The voltage-controlled voltage source combines input voltage source, rectifier, MOSFET, and boost diode. The current control loop is closed around the L₁R₅ pole, essentially eliminating the inductor from consideration during voltage control loop analysis.

Current Control Loop Click on image to enlarge.

The system plant of the current loop could be calculated by small signal analysis as equation (2).

Where V_RAMP is 2.55V.

The figure below is the frequency responses of current-loop where G_{PWM_Boost} is the system plant of the current-loop, G_{PWM_Boost_fc} is the frequency response of current error amplifier compensation and G_Close is loop gain of the current-loop. The current-loop bandwidth is determined by the crossover frequency (f_c) of loop gain G_Close. The gain of current-loop compensation in f_c is calculated as shown in equation (3).

The Frequency Responses of Current-loop Click on image to enlarge.

The figure below shows the bode plot of current-loop loop gain in 300W PC Power.

Bode Plot of Current-loop Loop Gain in 300W PC Power Click on image to enlarge.

The current loop compensation network includes an original pole that the system has no steady-state error; a zero to increase the bandwidth and phase margin; and a pole to reduce the high frequency disturbance. The crossover frequency (f_c) of loop gain should be 1/6 to 1/10 of switching frequency. Adjusting the zero (f_Z) and the pole (f_P) to a proper value could stabilize the system and has a better transient response, so that the zero is recommended 1/10 of crossover frequency and the pole is about 10 times of crossover frequency.

Voltage-Loop Compensation

The figure below shows a simplified block diagram of the voltage loop control. This approach is based on the notion that the voltage control loop can be characterized by the voltage controlled current source feeding output capacitor. We assume that the current loop generates full sine current waveforms that feed capacitor C₁₇ and a resistive load. The voltage error amplifier controls the amplitude of this current and the entire voltage loop closed around the current loop. In other words, the voltage controlled current source combined together with the input voltage source, rectifier, boost inductor, and diode generates full sine waveforms with a magnitude proportional to the output of the voltage error amplifier.

Simple Diagram of Voltage Loop Click on image to enlarge.

To prevent increasing the amplitude of third harmonics in the current waveform and to decrease distortion the bandwidth of the voltage control loop should be kept in a range from 10Hz to 30Hz. Low bandwidth will minimize the appearance of second harmonics in the input of the current loop and limited THD. The main reason for using a low-bandwidth voltage control loop is due to the phase difference between the waveforms of the input voltage and ripple voltage on the output of PFC. The reactive nature of the PFC load determines the phase difference. If not attenuated, the ripple voltage appears on the input and output of the gain modulator and the current waveforms can be distorted. Roll-off capacitor C₁₆ is usually used for second harmonic attenuation. However, too low of a bandwidth of the voltage loop can create transient response problems, so some second harmonic ripple is acceptable. This approach helps to determine a compromise between THD and transient response requirements. Assuming crossover frequency f_VC is 30Hz for the voltage loop and location of zero at f_VZ is 3Hz, we will place a voltage loop pole at the crossover frequency. To find second harmonic voltage ripple (V_{C17_SH}) across bulk capacitor C₁₇:

Where f_line is the line frequency, Z_C17 is the impedance of the bulk capacitor at the second harmonic, V_{C17_SH} is the second harmonic ripple voltage, V_EA is the output voltage range of the voltage error amplifier, V_VEA-H and V_VEA-L are the voltage error amplifier's maximum and minimum output voltages respectively.

According to the block diagram in the previous figure, the combined gain of the voltage error amplifier and the resistor divider can be shown in equation (8) and (9).

Where α is the total harmonics balance and ΔV_EA is the output voltage range of the voltage error amplifier. G_VD is the voltage divider gain. The gain of the voltage error amplifier at the second harmonic is shown in equation (10) and (11).

G_{EA_SH} and Z_{EA_SH} are error amplifier gain and impedance at second harmonic frequency. G_mV is voltage error amplifier transconductance. To ensure sufficient roll-off of voltage gain at second harmonic frequency C₁₆ is found from the equation (12).

The figure below shows Voltage Loop Bode Plots. To fine the values of R₁₂ and C₁₅, use the same approach described above in a current loop. The equation (13) defines gain of the boost section at crossover frequency (G_{VL_Boost_fVC}). The gain of the error amplifier in log from is determined in equation (14). The gain ensures that the closed loop Gain plot will intersect the frequency axe on Bode plots at unity gain. The value of R₁₂ and C₁₅ can be determined from equation (15) and (16).

Voltage Loop Bode Plots Click on image to enlarge.

PWM stage
The figure below shows the bode plot of voltage-loop loop gain in 300W PC power.

Bode Plot of Voltage-loop Loop Gain in 300W PC Power Click on image to enlarge.

PWM Stage

FAN480x offers two operate modes for PWM stage; voltage mode and current mode. Voltage mode could provide more stability for the system but response is slower than current mode. Current mode could provide a fast response but is easily influenced by noise. Voltage mode is operated by setting PWM duty cycle that FBPWM voltage is compared with RAMP pin internal triangle waveform as shown in Figure a. And the duty cycle of current mode is determined by feedback voltage FBPWM and current sense signal on sense resistor which is below the PWM MOSFET as shown in Figure b. Figure c shows the output voltage compensation circuitry. The small signal analysis of the compensation is calculated as equation (17). And the compensation method is also similar to the PFC stage.

Click on image to enlarge.

Click on image to enlarge.

The figures below show a 300W PC power PF and efficiency performance.

P.F and THD Performance vs. Vrms Line Voltage (first figure) - Efficiency and THD Performance vs. Output Power (second figure) Click on image to enlarge.

Conclusion

FAN480x is composed of average current mode control of Power Factor Correction (PFC) and Pulse-Width Modulation (PWM) that provides higher Power Factor (PF) and lower Total Harmonic Distortion (THD) for power supply. PFC stage current-loop compensation could let input current follow in face with input voltage waveform and voltage-loop compensation could provide stable output voltage. FAN480x offers an easier design, a host of protection features with very few external components and enables power supplies to meet increasingly stringent energy-efficiency and IEC-1000-3-2 specifications.